Defined in 5 files as a macro:

• drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h, line 131 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h, line 176 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h, line 874 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h, line 651 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h, line 1001 (as a macro)

Referenced in 1 files:

• drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c, line 1105