Defined in 6 files as a macro:

• drivers/gpu/drm/amd/include/asic_reg/mp/mp_10_0_offset.h, line 126 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_8_offset.h, line 126 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_0_offset.h, line 126 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/mp/mp_11_5_0_offset.h, line 126 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/mp/mp_12_0_0_offset.h, line 126 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h, line 126 (as a macro)

Referenced in 6 files:

• drivers/gpu/drm/amd/amdgpu/nv.c, line 521
• drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
  • line 155
  • line 157
  • line 163
  • line 198
  • line 283
  • line 284
• drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
  • line 79
  • line 117
  • line 139
  • line 140
• drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
  • line 88
  • line 129
  • line 153
  • line 154
• drivers/gpu/drm/amd/amdgpu/soc15.c, line 841
• drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c, line 2492