Defined in 14 files as a macro:
-
drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h,
line 1226
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h,
line 1037
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h,
line 1115
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h,
line 842
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h,
line 1135
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h,
line 1077
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h,
line 644
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h,
line 292
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_1_offset.h,
line 126
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h,
line 282
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h,
line 274
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_1_offset.h,
line 326
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_offset.h,
line 276
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_offset.h,
line 213
(as a macro)
Referenced in 3 files:
