Defined in 14 files as a macro:
-
drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h,
line 1227
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h,
line 1038
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h,
line 1116
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h,
line 844
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h,
line 1134
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h,
line 1078
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h,
line 646
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h,
line 294
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_1_offset.h,
line 128
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h,
line 284
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_0_offset.h,
line 276
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_1_offset.h,
line 328
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_2_offset.h,
line 278
(as a macro)
-
drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_3_0_3_offset.h,
line 215
(as a macro)
Referenced in 3 files:
