Defined in 4 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h, line 63 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_offset.h, line 126 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/thm/thm_11_0_2_offset.h, line 26 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_offset.h, line 196 (as a macro)