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Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 5 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c jpeg_v2_0_dec_ring_emit_vm_flush() -> jpeg_v2_0_dec_ring_emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 3 mask u32max
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c gmc_v12_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 0 ring->vm_hub 8
PARAM_VALUE 2 val 1
PARAM_VALUE 3 mask 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c amdgpu_ring_emit_reg_write_reg_wait_helper() -> (struct amdgpu_ring_funcs)->emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $2
DATA_SOURCE 2 val $4
DATA_SOURCE 3 mask $4
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c sdma_v7_0_ring_emit_reg_write_reg_wait() -> (struct amdgpu_ring_funcs)->emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 2 val 0
PARAM_VALUE 3 mask 0
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c sdma_v7_0_ring_emit_reg_write_reg_wait() -> (struct amdgpu_ring_funcs)->emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $2
DATA_SOURCE 2 val $4
DATA_SOURCE 3 mask $4
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c sdma_v7_1_ring_emit_reg_write_reg_wait() -> (struct amdgpu_ring_funcs)->emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 2 val 0
PARAM_VALUE 3 mask 0
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c sdma_v7_1_ring_emit_reg_write_reg_wait() -> (struct amdgpu_ring_funcs)->emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $2
DATA_SOURCE 2 val $4
DATA_SOURCE 3 mask $4
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c gmc_v10_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 0 ring->vm_hub 8
PARAM_VALUE 2 val 1
PARAM_VALUE 3 mask 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c sdma_v6_0_ring_emit_reg_write_reg_wait() -> (struct amdgpu_ring_funcs)->emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 2 val 0
PARAM_VALUE 3 mask 0
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c sdma_v6_0_ring_emit_reg_write_reg_wait() -> (struct amdgpu_ring_funcs)->emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $2
DATA_SOURCE 2 val $4
DATA_SOURCE 3 mask $4
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c gmc_v9_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 0 ring->vm_hub 8,12
PARAM_VALUE 2 val 1
PARAM_VALUE 3 mask 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c gmc_v11_0_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 0 ring->vm_hub 8
PARAM_VALUE 2 val 1
PARAM_VALUE 3 mask 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c sdma_v5_2_ring_emit_reg_write_reg_wait() -> (struct amdgpu_ring_funcs)->emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 2 val 0
PARAM_VALUE 3 mask 0
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c sdma_v5_2_ring_emit_reg_write_reg_wait() -> (struct amdgpu_ring_funcs)->emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $2
DATA_SOURCE 2 val $4
DATA_SOURCE 3 mask $4
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

drivers/gpu/drm/amd/amdgpu/gmc_v12_1.c gmc_v12_1_emit_flush_gpu_tlb() -> (struct amdgpu_ring_funcs)->emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
PARAM_VALUE 0 ring->vm_hub 8-u32max
PARAM_VALUE 2 val 1
PARAM_VALUE 3 mask 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_ring_emit_reg_write_reg_wait() -> (struct amdgpu_ring_funcs)->emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 2 val 0
PARAM_VALUE 3 mask 0
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_ring_emit_reg_write_reg_wait() -> (struct amdgpu_ring_funcs)->emit_reg_wait()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 reg $2
DATA_SOURCE 2 val $4
DATA_SOURCE 3 mask $4
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags