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Documented in 1 files:

Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/hid/intel-ish-hid/ipc/ipc.c _ish_ipc_reset() -> ish_reg_write()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->hw 4096-ptr_max
PARAM_VALUE 1 offset 84
PARAM_VALUE 2 value 0
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev->pdev (-1),1-s32max
DATA_SOURCE 0 dev $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 dev->pdev->current_state 0-3[c]
NO_OVERFLOW_SIMPLE 0 dev->fw_clients_num
HALF_LOCKED2 &pool->lock

drivers/hid/intel-ish-hid/ipc/ipc.c check_generated_interrupt() -> ish_reg_write()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->hw 4096-ptr_max
PARAM_VALUE 1 offset 12
PARAM_VALUE 2 value 1-u32max
DATA_SOURCE 0 dev $0
DATA_SOURCE 2 value r ish_reg_read
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 value 1-u32max
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 _T->lock
HALF_LOCKED2 flags
HALF_LOCKED2 irq

drivers/hid/intel-ish-hid/ipc/ipc.c ish_clr_host_rdy() -> ish_reg_write()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->hw 4096-ptr_max
PARAM_VALUE 1 offset 56
BUF_SIZE 0 dev s32min-(-2),1-s32max
BUF_SIZE 0 dev s32min-(-2),1-s32max
CAPPED_DATA 0 dev->devc->cma_area->nranges 1
DATA_SOURCE 0 dev $0
MEM_ZERO 0 dev->fw_clients_map
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 value 0-u32max
UNITS 0 dev unit_byte

drivers/hid/intel-ish-hid/ipc/ipc.c ish_disable_dma() -> ish_reg_write()

Type Parameter Key Value
PARAM_VALUE 1 offset 872
PARAM_VALUE 2 value 0
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev s32min-(-1),1-s32max
CAPPED_DATA 0 dev->devc->cma_area->nranges 1
DATA_SOURCE 0 dev $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 dev->fw_clients_num
UNITS 0 dev unit_byte
HALF_LOCKED2 &pool->lock

drivers/hid/intel-ish-hid/ipc/ipc.c ish_irq_handler() -> ish_reg_write()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->hw 4096-ptr_max
PARAM_VALUE 1 offset 84
PARAM_VALUE 2 value 0
DATA_SOURCE 0 dev $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 dev->pdev->current_state 0-3[c]
HOST_DATA 0 dev->pdev->sriov->offset 0
HOST_DATA 0 dev->pdev->sriov->stride 0
NO_OVERFLOW_SIMPLE 0 dev->fw_clients_num
NO_OVERFLOW_SIMPLE 0 dev->ishtp_dma_num_slots
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 flags

drivers/hid/intel-ish-hid/ipc/ipc.c ish_set_host_rdy() -> ish_reg_write()

Type Parameter Key Value
PARAM_VALUE 0 dev->hw 4096-ptr_max
PARAM_VALUE 1 offset 56
PARAM_VALUE 2 value 0,128-u32max
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev->pdev (-1),1-s32max
DATA_SOURCE 0 dev $0
BIT_INFO 2 value 0x80,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 dev->pdev->current_state 0-3[c]
HOST_DATA 2 value 0,128-u32max
UNITS 0 dev unit_byte

drivers/hid/intel-ish-hid/ipc/ipc.c ish_wakeup() -> ish_reg_write()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->hw 4096-ptr_max
PARAM_VALUE 1 offset 872
PARAM_VALUE 2 value 1
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev->pdev (-1),1-s32max
DATA_SOURCE 0 dev $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 dev->pdev->current_state 0-3[c]
NO_OVERFLOW_SIMPLE 0 dev->fw_clients_num
UNITS 0 dev unit_byte
HALF_LOCKED2 &pool->lock

drivers/hid/intel-ish-hid/ipc/ipc.c set_host_ready() -> ish_reg_write()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->hw 4096-ptr_max
PARAM_VALUE 1 offset 56
PARAM_VALUE 2 value 129
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev->pdev (-1),1-s32max
DATA_SOURCE 0 dev $0
BIT_INFO 0 dev->pdev->revision 0x0,0x8f
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 dev->pdev->current_state 0-3[c]
NO_OVERFLOW_SIMPLE 0 dev->fw_clients_num
UNITS 0 dev unit_byte
HALF_LOCKED2 &pool->lock

drivers/hid/intel-ish-hid/ipc/ipc.c set_host_ready() -> ish_reg_write()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->hw 4096-ptr_max
PARAM_VALUE 1 offset 56
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev->pdev (-1),1-s32max
DATA_SOURCE 0 dev $0
BIT_INFO 2 value 0x80000081,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 dev->pdev->current_state 0-3[c]
HOST_DATA 2 value 0-u32max
NO_OVERFLOW_SIMPLE 0 dev->fw_clients_num
UNITS 0 dev unit_byte
HALF_LOCKED2 &pool->lock

drivers/hid/intel-ish-hid/ipc/ipc.c set_host_ready() -> ish_reg_write()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->hw 4096-ptr_max
PARAM_VALUE 1 offset 8
PARAM_VALUE 2 value 1-u32max
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev->pdev (-1),1-s32max
DATA_SOURCE 0 dev $0
BIT_INFO 2 value 0x1,0xfffffeff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 dev->pdev->current_state 0-3[c]
HOST_DATA 2 value 1-u32max[c]
NO_OVERFLOW_SIMPLE 0 dev->fw_clients_num
UNITS 0 dev unit_byte
HALF_LOCKED2 &pool->lock

drivers/hid/intel-ish-hid/ipc/ipc.c write_ipc_from_queue() -> ish_reg_write()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->hw 4096-ptr_max
PARAM_VALUE 1 offset 224,228-u32max
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev->fw_loader_rx_buf (-1),124
CAPPED_DATA 0 &dev->wr_processing_list 1
DATA_SOURCE 0 dev $0
FUZZY_MAX 1 offset 224
PARAM_COMPARE 0 &dev->wr_processing_list != $0->wr_processing_list.next
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 dev->ishtp_msg_hdr 1-u32max
HOST_DATA 0 dev->pdev->current_state 0-3[c]
NO_OVERFLOW_SIMPLE 0 dev->fw_clients_num
NO_OVERFLOW_SIMPLE 0 dev->ishtp_dma_num_slots
LOCK2 flags
LOCK2 0 &dev->wr_processing_spinlock
HALF_LOCKED2 0 &dev->cl_list_lock
HALF_LOCKED2 0 &dev->read_list_spinlock
TYPE_LOCK (struct ishtp_device)->wr_processing_spinlock

drivers/hid/intel-ish-hid/ipc/ipc.c write_ipc_from_queue() -> ish_reg_write()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->hw 4096-ptr_max
PARAM_VALUE 1 offset 224,228-u32max
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev->fw_loader_rx_buf (-1),124
CAPPED_DATA 0 &dev->wr_processing_list 1
DATA_SOURCE 0 dev $0
FUZZY_MAX 1 offset 224
PARAM_COMPARE 0 &dev->wr_processing_list != $0->wr_processing_list.next
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 dev->ishtp_msg_hdr 1-u32max
HOST_DATA 0 dev->pdev->current_state 0-3[c]
NO_OVERFLOW_SIMPLE 0 dev->fw_clients_num
NO_OVERFLOW_SIMPLE 0 dev->ishtp_dma_num_slots
LOCK2 flags
LOCK2 0 &dev->wr_processing_spinlock
HALF_LOCKED2 0 &dev->cl_list_lock
HALF_LOCKED2 0 &dev->read_list_spinlock
TYPE_LOCK (struct ishtp_device)->wr_processing_spinlock

drivers/hid/intel-ish-hid/ipc/ipc.c write_ipc_from_queue() -> ish_reg_write()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->hw 4096-ptr_max
PARAM_VALUE 1 offset 72
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev s32min-(-1),1-s32max
BUF_SIZE 0 dev->fw_loader_rx_buf (-1),124
CAPPED_DATA 0 &dev->wr_processing_list 1
DATA_SOURCE 0 dev $0
PARAM_COMPARE 0 &dev->wr_processing_list != $0->wr_processing_list.next
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 dev->ishtp_msg_hdr 1-u32max
HOST_DATA 0 dev->pdev->current_state 0-3[c]
NO_OVERFLOW_SIMPLE 0 dev->fw_clients_num
NO_OVERFLOW_SIMPLE 0 dev->ishtp_dma_num_slots
LOCK2 flags
LOCK2 0 &dev->wr_processing_spinlock
HALF_LOCKED2 0 &dev->cl_list_lock
HALF_LOCKED2 0 &dev->read_list_spinlock
TYPE_LOCK (struct ishtp_device)->wr_processing_spinlock