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Defined in 1 files as a function:

Referenced in 8 files:

Smatch caller information:

drivers/cxl/core/ras.c dport_to_host() -> is_cxl_root()

Type Parameter Key Value
RX_PATH
TASK_NOT_RUNNING

drivers/cxl/core/cdat.c cxl_endpoint_gather_bandwidth() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
DATA_SOURCE 0 port r to_cxl_port
RX_PATH
TASK_NOT_RUNNING
LOCK2 _T->lock
HALF_LOCKED2 &of->mutex

drivers/cxl/core/cdat.c cxl_switch_gather_bandwidth() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
DATA_SOURCE 0 port r to_cxl_port
RX_PATH
TASK_NOT_RUNNING
LOCK2 _T->lock
HALF_LOCKED2 &of->mutex

drivers/cxl/core/region.c __cxl_decoder_detach() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 _T->lock

drivers/cxl/core/region.c __cxl_decoder_detach() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
DATA_SOURCE 0 port r to_cxl_port
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 _T->lock

drivers/cxl/core/region.c cxl_calc_interleave_pos() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 1-u64max
RX_PATH
TASK_NOT_RUNNING
LOCK2 _T->lock
HALF_LOCKED2 &of->mutex

drivers/cxl/core/region.c cxl_port_setup_targets() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
DATA_SOURCE 0 port r to_cxl_port
RX_PATH
TASK_NOT_RUNNING
LOCK2 _T->lock
HALF_LOCKED2 &of->mutex

drivers/cxl/core/region.c cxl_port_setup_targets() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
DATA_SOURCE 0 port r to_cxl_port
RX_PATH
TASK_NOT_RUNNING
LOCK2 _T->lock
HALF_LOCKED2 &of->mutex

drivers/cxl/core/region.c cxl_region_attach_position() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
LOCK2 _T->lock
HALF_LOCKED2 &of->mutex

drivers/cxl/core/region.c cxl_region_attach_position() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
DATA_SOURCE 0 port r to_cxl_port
RX_PATH
TASK_NOT_RUNNING
LOCK2 _T->lock
HALF_LOCKED2 &of->mutex

drivers/cxl/core/region.c cxl_region_attach_position() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
LOCK2 _T->lock
HALF_LOCKED2 &of->mutex

drivers/cxl/core/region.c cxl_region_attach_position() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
DATA_SOURCE 0 port r to_cxl_port
RX_PATH
TASK_NOT_RUNNING
LOCK2 _T->lock
HALF_LOCKED2 &of->mutex

drivers/cxl/core/region.c cxl_region_decode_commit() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
LOCK2 &of->mutex
HALF_LOCKED2 &of->prealloc_mutex
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct kernfs_open_file)->mutex

drivers/cxl/core/region.c cxl_region_decode_commit() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
DATA_SOURCE 0 port r to_cxl_port
RX_PATH
TASK_NOT_RUNNING
LOCK2 &of->mutex
HALF_LOCKED2 &of->prealloc_mutex
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct kernfs_open_file)->mutex

drivers/cxl/core/region.c cxl_region_decode_reset() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &of->mutex
HALF_LOCKED2 _T->lock

drivers/cxl/core/region.c cxl_region_decode_reset() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &of->mutex
HALF_LOCKED2 _T->lock

drivers/cxl/core/region.c cxl_region_setup_targets() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
LOCK2 _T->lock
HALF_LOCKED2 &of->mutex

drivers/cxl/core/region.c cxl_region_setup_targets() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
LOCK2 _T->lock
HALF_LOCKED2 &of->mutex

drivers/cxl/core/region.c cxl_region_teardown_targets() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 _T->lock

drivers/cxl/core/region.c cxl_region_teardown_targets() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 _T->lock

drivers/cxl/core/port.c __devm_cxl_add_dport() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
DATA_SOURCE 0 port $0
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 port->reg_map.max_size
HALF_LOCKED2 0 &port->dev.mutex

drivers/cxl/core/port.c cond_cxl_root_lock() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
DATA_SOURCE 0 port $0
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 port->reg_map.max_size
HALF_LOCKED2 0 &port->dev.mutex

drivers/cxl/core/port.c cond_cxl_root_unlock() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
DATA_SOURCE 0 port $0
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 port->reg_map.max_size
HALF_LOCKED2 0 &port->dev.mutex

drivers/cxl/core/port.c cxl_debugfs_create_dport_dir() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 1-u64max
RX_PATH
TASK_NOT_RUNNING

drivers/cxl/core/port.c cxl_detach_ep() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
DATA_SOURCE 0 port r to_cxl_port
LOCK2 &port->dev.mutex
LOCK2 0 &port->dev.mutex
TYPE_LOCK (struct device)->mutex

drivers/cxl/core/port.c cxl_device_id() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &of->mutex

drivers/cxl/core/port.c cxl_port_alloc() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &host->mutex
HALF_LOCKED2 &parent_port->dev.mutex

drivers/cxl/core/port.c cxl_port_alloc() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &host->mutex
HALF_LOCKED2 &parent_port->dev.mutex

drivers/cxl/core/port.c cxl_port_release() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
DATA_SOURCE 0 port r to_cxl_port
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &subsys->su_mutex

drivers/cxl/core/port.c cxl_port_to_pci_bus() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
PARAM_VALUE 0 port->uport_dev 4096-ptr_max
CAPPED_DATA 0 port->uport_dev 1
DATA_SOURCE 0 port $0
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 port->reg_map.max_size
LOCK2 0 &port->dev.mutex
HALF_LOCKED2 &dev->mutex
HALF_LOCKED2 &parent_port->dev.mutex
TYPE_LOCK (struct device)->mutex

drivers/cxl/core/port.c cxl_root_decoder_alloc() -> is_cxl_root()

Type Parameter Key Value
DATA_SOURCE 0 port $0
RX_PATH
TASK_NOT_RUNNING

drivers/cxl/core/port.c cxl_switch_decoder_alloc() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
PARAM_VALUE 0 port->uport_dev 4096-ptr_max
CAPPED_DATA 0 port->uport_dev 1
DATA_SOURCE 0 port $0
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 port->reg_map.max_size
HALF_LOCKED2 &dev->mutex
HALF_LOCKED2 0 &port->dev.mutex

drivers/cxl/core/port.c dev_is_cxl_root_child() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
DATA_SOURCE 0 port r to_cxl_port
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->mutex

drivers/cxl/core/port.c dev_is_cxl_root_child() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
DATA_SOURCE 0 port r to_cxl_port
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->mutex

drivers/cxl/core/port.c dport_to_host() -> is_cxl_root()

Type Parameter Key Value
RX_PATH
TASK_NOT_RUNNING

drivers/cxl/core/port.c find_cxl_root() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 1-u64max
RX_PATH
TASK_NOT_RUNNING

drivers/cxl/core/port.c find_cxl_root() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
DATA_SOURCE 0 port r to_cxl_port
RX_PATH
TASK_NOT_RUNNING

drivers/cxl/core/port.c parent_port_is_cxl_root() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 _T->lock

drivers/cxl/core/port.c port_to_host() -> is_cxl_root()

Type Parameter Key Value
BUF_SIZE 0 port (-1),2192
BUF_SIZE 0 port (-1),2192
BUF_SIZE 0 port->uport_dev (-1),1616
DATA_SOURCE 0 port $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &host->mutex

drivers/cxl/core/port.c port_to_host() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &host->mutex

drivers/cxl/core/pci.c cxl_hdm_decode_init() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->mutex

drivers/cxl/core/pci.c cxl_hdm_decode_init() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
DATA_SOURCE 0 port r to_cxl_port
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->mutex

drivers/cxl/core/pci.c cxl_hdm_decode_init() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
CAPPED_DATA 0 port->dev.parent 1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->mutex

drivers/cxl/core/hdm.c devm_cxl_switch_port_decoders_setup() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
PARAM_VALUE 0 port->uport_dev 4096-ptr_max
DATA_SOURCE 0 port $0
RX_PATH
TASK_NOT_RUNNING
LOCK2 0 &port->dev.mutex
HALF_LOCKED2 &dev->mutex
HALF_LOCKED2 &parent_port->dev.mutex
TYPE_LOCK (struct device)->mutex

drivers/cxl/port.c devm_cxl_add_endpoint() -> is_cxl_root()

Type Parameter Key Value
RX_PATH
TASK_NOT_RUNNING
LOCK2 &host->mutex
HALF_LOCKED2 &dev->mutex
TYPE_LOCK (struct device)->mutex

drivers/cxl/port.c devm_cxl_add_endpoint() -> is_cxl_root()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
DATA_SOURCE 0 port r to_cxl_port
RX_PATH
TASK_NOT_RUNNING
LOCK2 &host->mutex
HALF_LOCKED2 &dev->mutex
TYPE_LOCK (struct device)->mutex