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Defined in 1 files as a function:

Referenced in 5 files:

Smatch caller information:

drivers/cxl/core/port.c cxl_endpoint_decoder_alloc() -> is_cxl_endpoint()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
PARAM_VALUE 0 port->uport_dev 4096-ptr_max
PARAM_VALUE 0 port->uport_dev->type 4096-ptr_max
DATA_SOURCE 0 port $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->mutex
HALF_LOCKED2 &port->dev.mutex

drivers/cxl/core/port.c cxl_endpoint_get_perf_coordinates() -> is_cxl_endpoint()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
PARAM_VALUE 0 port->uport_dev 4096-ptr_max
PARAM_VALUE 0 port->uport_dev->type 4096-ptr_max
DATA_SOURCE 0 port $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->mutex

drivers/cxl/core/port.c cxl_switch_decoder_alloc() -> is_cxl_endpoint()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
PARAM_VALUE 0 port->uport_dev 4096-ptr_max
PARAM_VALUE 0 port->uport_dev->type 0-1418481967136677887,1418481967136677889-5146549243930066943
CAPPED_DATA 0 port->uport_dev 1
DATA_SOURCE 0 port $0
PARAM_COMPARE 0 port->dev.parent != $0->uport_dev
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 port->reg_map.max_size
HALF_LOCKED2 &dev->mutex
HALF_LOCKED2 0 &port->dev.mutex

drivers/cxl/core/hdm.c cxl_setup_hdm_decoder_from_dvsec() -> is_cxl_endpoint()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
PARAM_VALUE 0 port->uport_dev 4096-ptr_max
PARAM_VALUE 0 port->uport_dev->type 0-ptr_max
DATA_SOURCE 0 port $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->mutex
HALF_LOCKED2 &port->dev.mutex

drivers/cxl/core/hdm.c devm_cxl_endpoint_decoders_setup() -> is_cxl_endpoint()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
PARAM_VALUE 0 port->uport_dev->type 4096-ptr_max
DATA_SOURCE 0 port $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->mutex

drivers/cxl/core/hdm.c devm_cxl_enumerate_decoders() -> is_cxl_endpoint()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
PARAM_VALUE 0 port->uport_dev 4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 port->reg_map.max_size
HALF_LOCKED2 &dev->mutex
HALF_LOCKED2 &port->dev.mutex

drivers/cxl/core/hdm.c devm_cxl_switch_port_decoders_setup() -> is_cxl_endpoint()

Type Parameter Key Value
PARAM_VALUE 0 port 4096-ptr_max
PARAM_VALUE 0 port->uport_dev 4096-ptr_max
CAPPED_DATA 0 port->uport_dev 1
DATA_SOURCE 0 port $0
PARAM_COMPARE 0 port->dev.parent != $0->uport_dev
RX_PATH
TASK_NOT_RUNNING
LOCK2 0 &port->dev.mutex
HALF_LOCKED2 &dev->mutex
HALF_LOCKED2 &parent_port->dev.mutex
TYPE_LOCK (struct device)->mutex

drivers/cxl/core/memdev.c cxl_trigger_poison_list() -> is_cxl_endpoint()

Type Parameter Key Value
PARAM_VALUE 0 port 1-u64max
RX_PATH
TASK_NOT_RUNNING
LOCK2 &of->mutex
HALF_LOCKED2 &of->prealloc_mutex
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct kernfs_open_file)->mutex

drivers/cxl/port.c cxl_port_probe() -> is_cxl_endpoint()

Type Parameter Key Value
PARAM_VALUE 0 port 0,4096-ptr_max
DATA_SOURCE 0 port r to_cxl_port
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->mutex