| PARAM_VALUE |
0 |
desc |
4096-ptr_max |
| PARAM_VALUE |
0 |
desc->affinity_notify |
1-u64max |
| DATA_SOURCE |
0 |
desc |
r irq_to_desc |
| PREEMPT_ADD |
|
|
<- disables preempt |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| NOCHECK_CALL |
|
|
|
| HOST_DATA |
0 |
desc->irq_data->chip_data->iommu |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data->parent_data->chip_data->iommu |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->acpi_flags |
0-255 |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->cap |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->cap_ptr |
0-u16max |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->cmd_buf_head |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->cmd_buf_tail |
0-8191 |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->cmd_sem_paddr |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->cmd_sem_val |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->dbg_cap_offset |
s32min-s32max |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->dbg_mmio_offset |
s32min-s32max |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->devid |
0-u16max |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->features |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->features2 |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->flags |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->index |
s32min-s32max |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->int_enabled |
0-1 |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->iommu.max_pasids |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->iommu.ready |
0-1 |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->irtcachedis_enabled |
0 |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->max_banks |
0-255 |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->max_counters |
0-255 |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->mmio_phys |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->mmio_phys_end |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->need_sync |
1 |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->stored_addr_hi |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.chip_data->iommu->stored_addr_lo |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->acpi_flags |
0-255 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->cap |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->cap_ptr |
0-u16max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->cmd_buf_head |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->cmd_buf_tail |
0-8191 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->cmd_sem_paddr |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->cmd_sem_val |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->dbg_cap_offset |
s32min-s32max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->dbg_mmio_offset |
s32min-s32max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->devid |
0-u16max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->features |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->features2 |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->flags |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->index |
s32min-s32max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->int_enabled |
0-1 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->iommu.max_pasids |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->iommu.ready |
0-1 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->irtcachedis_enabled |
0 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->max_banks |
0-255 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->max_counters |
0-255 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->mmio_phys |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->mmio_phys_end |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->need_sync |
1 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->stored_addr_hi |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->chip_data->iommu->stored_addr_lo |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->acpi_flags |
0-255 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->cap |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->cap_ptr |
0-u16max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->cmd_buf_head |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->cmd_buf_tail |
0-8191 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->cmd_sem_paddr |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->cmd_sem_val |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->dbg_cap_offset |
s32min-s32max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->dbg_mmio_offset |
s32min-s32max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->devid |
0-u16max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->features |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->features2 |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->flags |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->index |
s32min-s32max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->int_enabled |
0-1 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->iommu.max_pasids |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->iommu.ready |
0-1 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->irtcachedis_enabled |
0-1 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->max_banks |
0-255 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->max_counters |
0-255 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->mmio_phys |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->mmio_phys_end |
s64min-s64max |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->need_sync |
1 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->stored_addr_hi |
0-4294967295 |
| HOST_DATA |
0 |
desc->irq_data.parent_data->parent_data->chip_data->iommu->stored_addr_lo |
0-4294967295 |
| LOCK2 |
0 |
&desc->lock |
|
| HALF_LOCKED2 |
|
flags |
|
| TYPE_LOCK |
|
(struct irq_desc)->lock |
|