intel_set_cpu_fifo_underrun_reporting identifier - Linux source code next-20260811

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FIXME
- FIXME
  - next-20260811

Documented in 1 files:

drivers/gpu/drm/i915/display/intel_fifo_underrun.c, line 383

Defined in 1 files as a prototype:

drivers/gpu/drm/i915/display/intel_fifo_underrun.h, line 17 (as a prototype)

Defined in 1 files as a function:

drivers/gpu/drm/i915/display/intel_fifo_underrun.c, line 399 (as a function)

Referenced in 8 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_crt.c hsw_enable_crt() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	2	enable	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2		&pool->lock

drivers/gpu/drm/i915/display/intel_crt.c hsw_pre_enable_crt() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	2	enable	0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_fifo_underrun.c intel_cpu_fifo_underrun_irq_handler() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->info.__device_info	4096-ptr_max
PARAM_VALUE	0	display->irq.funcs	4096-ptr_max
PARAM_VALUE	0	display->irq.funcs->handler	2192072823877971968,2792595683100205056,5955815596145336320,7942455435531735040,8138603768813838336,8705323516099022848
PARAM_VALUE	0	*display->irq.de_pipe_imr_mask	0-4294967295
PARAM_VALUE	1	pipe	0-3
PARAM_VALUE	2	enable	0
CAPPED_DATA	1	pipe	1
DATA_SOURCE	0	display	$0
DATA_SOURCE	1	pipe	$1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags

drivers/gpu/drm/i915/display/intel_ddi.c intel_ddi_pre_enable() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	2	enable	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/vlv_dsi.c intel_dsi_pre_enable() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->drm	0,4096-ptr_max
PARAM_VALUE	2	enable	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/g4x_hdmi.c intel_disable_hdmi() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->pch_type	1
PARAM_VALUE	0	display->wl.taken	1
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	1	pipe	0
PARAM_VALUE	2	enable	0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/g4x_hdmi.c intel_disable_hdmi() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->info.__device_info	4096-ptr_max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->pch_type	1
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	*display->irq.de_pipe_imr_mask	0-4294967295
PARAM_VALUE	1	pipe	0
PARAM_VALUE	2	enable	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_display.c i9xx_crtc_disable() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	0	*display->irq.pipestat_irq_mask	0-4294967295
PARAM_VALUE	2	enable	0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	display->dmc.dmc->dc6_allowed.dc5_start	0-4294967295
HOST_DATA	0	display->power.domains.dc_state	0-u32max

drivers/gpu/drm/i915/display/intel_display.c i9xx_crtc_enable() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	2	enable	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2		&pool->lock

drivers/gpu/drm/i915/display/intel_display.c ilk_crtc_disable() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	2	enable	0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_display.c ilk_crtc_disable() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->info.__device_info	4096-ptr_max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->wl.work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	*display->irq.de_pipe_imr_mask	0-4294967295
PARAM_VALUE	2	enable	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_display.c ilk_crtc_enable() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	2	enable	0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2		&pool->lock

drivers/gpu/drm/i915/display/intel_display.c ilk_crtc_enable() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->info.__device_info	4096-ptr_max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->wl.taken	1
PARAM_VALUE	0	display->wl.work->timer->entry.pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	*display->irq.de_pipe_imr_mask	0-4294967295
PARAM_VALUE	2	enable	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2		&pool->lock

drivers/gpu/drm/i915/display/intel_display.c intel_atomic_commit_tail() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->dkl.phy_lock.rlock.dep_map->name	0-255
PARAM_VALUE	0	display->dmc.dmc->dc6_allowed.count	0-4294967295
PARAM_VALUE	0	display->dmc.dmc->dc6_allowed.dc5_start	0-4294967295
PARAM_VALUE	0	display->drm	4096-ptr_max
PARAM_VALUE	0	display->hotplug.poll_enabled	0
PARAM_VALUE	0	display->hotplug.poll_init_work.entry.next	4096-ptr_max
PARAM_VALUE	0	display->hotplug.poll_init_work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->irq.vlv_display_irqs_enabled	1
PARAM_VALUE	0	display->modeset.funcs	4096-ptr_max
PARAM_VALUE	0	display->parent	4096-ptr_max
PARAM_VALUE	0	display->parent->transient_data_flush	0
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->power.domains.lock.dep_map->name	0-255
PARAM_VALUE	0	display->power.domains.lock.first_waiter->list.prev->next	5159360019465732096
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name	0-255
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.owner	(-1)
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu	4294967295
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter	s32min-s32max
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->usage.refs.counter	s32min-s32max
PARAM_VALUE	0	display->power.domains.lock.osq.tail.counter	0-s32max
PARAM_VALUE	0	display->power.domains.power_wells->count	s32min-s32max
PARAM_VALUE	0	display->power.domains.power_wells->hw_enabled	1
PARAM_VALUE	0	display->psr_dc5_dc6_wa_work.entry.next	4096-ptr_max
PARAM_VALUE	0	display->wl.enabled	0
PARAM_VALUE	0	display->wl.work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	*display->irq.de_pipe_imr_mask	0-4294967295
PARAM_VALUE	0	*display->irq.pipestat_irq_mask	0-4294967295
PARAM_VALUE	2	enable	1
CAPPED_DATA	0	display->drm->mode_config.num_crtc	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	display->dmc.dmc->dc6_allowed.dc5_start	0-4294967295
HOST_DATA	0	display->power.domains.dc_state	0-u32max
HALF_LOCKED2		&pool->lock

drivers/gpu/drm/i915/display/intel_display.c intel_crtc_arm_fifo_underrun() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	2	enable	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2		&crtc->base.mutex

drivers/gpu/drm/i915/display/intel_display.c intel_plane_disable_noatomic() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->drm	0,4096-ptr_max
PARAM_VALUE	0	display->info.__device_info	4096-ptr_max
PARAM_VALUE	2	enable	0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2		&display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_display.c intel_pre_plane_update() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->info.__device_info	4096-ptr_max
PARAM_VALUE	2	enable	0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2		&pool->lock

drivers/gpu/drm/i915/display/intel_display.c valleyview_crtc_enable() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->info.__device_info	4096-ptr_max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->wl.taken	1
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	2	enable	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2		&pool->lock

drivers/gpu/drm/i915/display/intel_sdvo.c intel_disable_sdvo() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->pch_type	1
PARAM_VALUE	0	display->wl.taken	1
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	1	pipe	0
PARAM_VALUE	2	enable	0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_sdvo.c intel_disable_sdvo() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->info.__device_info	4096-ptr_max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->pch_type	1
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	*display->irq.de_pipe_imr_mask	0-4294967295
PARAM_VALUE	1	pipe	0
PARAM_VALUE	2	enable	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/g4x_dp.c intel_dp_link_down() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->drm	0,4096-ptr_max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->pch_type	1
PARAM_VALUE	0	display->wl.taken	1
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	1	pipe	0
PARAM_VALUE	2	enable	0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/g4x_dp.c intel_dp_link_down() -> intel_set_cpu_fifo_underrun_reporting()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->drm	0,4096-ptr_max
PARAM_VALUE	0	display->info.__device_info	4096-ptr_max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->pch_type	1
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	*display->irq.de_pipe_imr_mask	0-4294967295
PARAM_VALUE	1	pipe	0
PARAM_VALUE	2	enable	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL