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Defined in 1 files as a function:

Referenced in 5 files:

Smatch caller information:

drivers/gpu/drm/i915/gt/gen6_engine_cs.c gen6_emit_breadcrumb_rcs() -> intel_ring_offset()

Type Parameter Key Value
PARAM_VALUE 0 rq 4096-ptr_max
PARAM_VALUE 0 rq->ring 4096-ptr_max
PARAM_VALUE 1 addr 4110-18446744073709547521
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq->engine (-1),3608,6504
CAPPED_DATA 0 rq->timeline 1
DATA_SOURCE 0 rq $0
DATA_SOURCE 1 addr $1 [m]
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 rq->engine->execlists.reset_ccid 0-u32max
NO_OVERFLOW_SIMPLE 0 rq->context->ring_size
HALF_LOCKED2 &ce->timeline->mutex
HALF_LOCKED2 &engine->sched_engine->lock
HALF_LOCKED2 irq

drivers/gpu/drm/i915/gt/gen6_engine_cs.c gen6_emit_breadcrumb_xcs() -> intel_ring_offset()

Type Parameter Key Value
PARAM_VALUE 0 rq 4096-ptr_max
PARAM_VALUE 0 rq->ring 4096-ptr_max
PARAM_VALUE 1 addr 4100-18446744073709547521
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq->engine (-1),3608,6504
DATA_SOURCE 0 rq $0
DATA_SOURCE 1 addr $1 [m]
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 rq->engine->execlists.reset_ccid 0-u32max
NO_OVERFLOW_SIMPLE 0 rq->context->ring_size
HALF_LOCKED2 &ce->timeline->mutex
HALF_LOCKED2 &engine->sched_engine->lock
HALF_LOCKED2 irq

drivers/gpu/drm/i915/gt/gen6_engine_cs.c gen7_emit_breadcrumb_rcs() -> intel_ring_offset()

Type Parameter Key Value
PARAM_VALUE 0 rq 4096-ptr_max
PARAM_VALUE 0 rq->ring 4096-ptr_max
PARAM_VALUE 1 addr 4102-18446744073709547521
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq->engine (-1),3608,6504
CAPPED_DATA 0 rq->timeline 1
DATA_SOURCE 0 rq $0
DATA_SOURCE 1 addr $1 [m]
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 rq->engine->execlists.reset_ccid 0-u32max
NO_OVERFLOW_SIMPLE 0 rq->context->ring_size
HALF_LOCKED2 &ce->timeline->mutex
HALF_LOCKED2 &engine->sched_engine->lock
HALF_LOCKED2 irq

drivers/gpu/drm/i915/gt/gen6_engine_cs.c gen7_emit_breadcrumb_xcs() -> intel_ring_offset()

Type Parameter Key Value
PARAM_VALUE 0 rq 4096-ptr_max
PARAM_VALUE 0 rq->ring 4096-ptr_max
PARAM_VALUE 1 addr 4107-18446744073709547521
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq->engine (-1),3608,6504
DATA_SOURCE 0 rq $0
DATA_SOURCE 1 addr $1 [m]
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 rq->engine->execlists.reset_ccid 0-u32max
NO_OVERFLOW_SIMPLE 0 rq->context->ring_size
HALF_LOCKED2 &ce->timeline->mutex
HALF_LOCKED2 &engine->sched_engine->lock
HALF_LOCKED2 irq

drivers/gpu/drm/i915/gt/gen8_engine_cs.c gen12_emit_fini_breadcrumb_tail() -> intel_ring_offset()

Type Parameter Key Value
PARAM_VALUE 0 rq 4096-ptr_max
PARAM_VALUE 0 rq->ring 4096-ptr_max
PARAM_VALUE 1 addr 4102-18446744073709547521
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq->engine (-1),3608,6504
CAPPED_DATA 0 rq->timeline 1
DATA_SOURCE 0 rq $0
DATA_SOURCE 1 addr $1 [m]
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 rq->engine->execlists.reset_ccid 0-u32max
NO_OVERFLOW_SIMPLE 0 rq->context->ring_size
HALF_LOCKED2 &ce->timeline->mutex
HALF_LOCKED2 &engine->sched_engine->lock
HALF_LOCKED2 irq

drivers/gpu/drm/i915/gt/gen8_engine_cs.c gen8_emit_fini_breadcrumb_tail() -> intel_ring_offset()

Type Parameter Key Value
PARAM_VALUE 0 rq 4096-ptr_max
PARAM_VALUE 0 rq->ring 4096-ptr_max
PARAM_VALUE 1 addr 4102-18446744073709547521
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq->engine (-1),3608,6504
CAPPED_DATA 0 rq->timeline 1
DATA_SOURCE 0 rq $0
DATA_SOURCE 1 addr $1 [m]
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 rq->engine->execlists.reset_ccid 0-u32max
NO_OVERFLOW_SIMPLE 0 rq->context->ring_size
HALF_LOCKED2 &ce->timeline->mutex
HALF_LOCKED2 &engine->sched_engine->lock
HALF_LOCKED2 irq

drivers/gpu/drm/i915/gt/gen8_engine_cs.c gen8_emit_init_breadcrumb() -> intel_ring_offset()

Type Parameter Key Value
PARAM_VALUE 0 rq 4096-ptr_max
PARAM_VALUE 0 rq->ring 4096-ptr_max
PARAM_VALUE 1 addr 4102-18446744073709547521
BUF_SIZE 0 rq (-1)-s32max
BUF_SIZE 0 rq (-1)-s32max
BUF_SIZE 0 rq->context (-1)-s32max
CAPPED_DATA 0 rq->context 1
CAPPED_DATA 0 rq->ring 1
CAPPED_DATA 0 rq->timeline 1
DATA_SOURCE 0 rq $0
STR_LEN 0 rq->context (-1),4
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 rq->engine->execlists.reset_ccid 0-u32max
NO_OVERFLOW_SIMPLE 0 rq->context->ring_size
HALF_LOCKED2 &pxp->tee_mutex
HALF_LOCKED2 &vgpu->vgpu_lock
HALF_LOCKED2 obj->base.resv
HALF_LOCKED2 pkt->bb_vma->obj->base.resv
HALF_LOCKED2 pkt->heci_pkt_vma->obj->base.resv
HALF_LOCKED2 rpcs->base.resv

drivers/gpu/drm/i915/gt/gen8_engine_cs.c gen8_emit_wa_tail() -> intel_ring_offset()

Type Parameter Key Value
PARAM_VALUE 0 rq 4096-ptr_max
PARAM_VALUE 0 rq->ring 4096-ptr_max
PARAM_VALUE 1 addr 4104-18446744073709547521
BUF_SIZE 0 rq->context (-1),1-s32max
BUF_SIZE 0 rq->engine (-1),3608,6504
BUF_SIZE 0 rq->ring (-1),56
CAPPED_DATA 0 rq->tail 1
CAPPED_DATA 0 rq->timeline 1
DATA_SOURCE 0 rq $0
DATA_SOURCE 1 addr $1 [m]
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 rq->engine->execlists.reset_ccid 0-u32max
NO_OVERFLOW_SIMPLE 0 rq->context->ring_size
NO_OVERFLOW_SIMPLE 0 rq->ring->effective_size
HALF_LOCKED2 &ce->timeline->mutex
HALF_LOCKED2 &engine->sched_engine->lock
HALF_LOCKED2 irq

drivers/gpu/drm/i915/gt/gen2_engine_cs.c __gen2_emit_breadcrumb() -> intel_ring_offset()

Type Parameter Key Value
PARAM_VALUE 0 rq 4096-ptr_max
PARAM_VALUE 0 rq->ring 4096-ptr_max
PARAM_VALUE 1 addr 4104-18446744073709547521
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq->engine (-1),3608,6504
DATA_SOURCE 0 rq $0
DATA_SOURCE 1 addr $1 [m]
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 rq->engine->execlists.reset_ccid 0-u32max
NO_OVERFLOW_SIMPLE 0 rq->context->ring_size
HALF_LOCKED2 &ce->timeline->mutex
HALF_LOCKED2 &engine->sched_engine->lock
HALF_LOCKED2 irq

drivers/gpu/drm/i915/i915_request.c __i915_request_commit() -> intel_ring_offset()

Type Parameter Key Value
PARAM_VALUE 0 rq 4096-ptr_max
PARAM_VALUE 0 rq->ring 4096-ptr_max
PARAM_VALUE 1 addr 4096-u64max
BUF_SIZE 0 rq (-1)-s32max
BUF_SIZE 0 rq (-1)-s32max
CAPPED_DATA 0 rq->ring 1
DATA_SOURCE 0 rq $0
DATA_SOURCE 1 addr r intel_ring_begin
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 rq->context->ring_size
NO_OVERFLOW_SIMPLE 0 rq->ring->size
HALF_LOCKED2 &ce->timeline->mutex
HALF_LOCKED2 &wf->mutex

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c emit_fini_breadcrumb_child_no_preempt_mid_batch() -> intel_ring_offset()

Type Parameter Key Value
PARAM_VALUE 0 rq 4096-ptr_max
PARAM_VALUE 0 rq->ring 4096-ptr_max
PARAM_VALUE 1 addr 4102-18446744073709547521
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq->engine (-1),3608,6504
CAPPED_DATA 0 rq->timeline 1
DATA_SOURCE 0 rq $0
DATA_SOURCE 1 addr $1 [m]
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 rq->engine->execlists.reset_ccid 0-u32max
NO_OVERFLOW_SIMPLE 0 rq->context->ring_size
HALF_LOCKED2 &ce->timeline->mutex
HALF_LOCKED2 &engine->sched_engine->lock
HALF_LOCKED2 irq

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c emit_fini_breadcrumb_parent_no_preempt_mid_batch() -> intel_ring_offset()

Type Parameter Key Value
PARAM_VALUE 0 rq 4096-ptr_max
PARAM_VALUE 0 rq->ring 4096-ptr_max
PARAM_VALUE 1 addr 4102-18446744073709547521
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq (-1),1-s32max
BUF_SIZE 0 rq->engine (-1),3608,6504
CAPPED_DATA 0 rq->timeline 1
DATA_SOURCE 0 rq $0
DATA_SOURCE 1 addr $1 [m]
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 rq->engine->execlists.reset_ccid 0-u32max
NO_OVERFLOW_SIMPLE 0 rq->context->ring_size
HALF_LOCKED2 &ce->timeline->mutex
HALF_LOCKED2 &engine->sched_engine->lock
HALF_LOCKED2 irq