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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_display.c intel_get_transcoder_timings() -> intel_pipe_is_interlaced()

Type Parameter Key Value
PARAM_VALUE 0 crtc_state 4096-ptr_max
PARAM_VALUE 0 crtc_state->active_non_psr_pipes 0
PARAM_VALUE 0 crtc_state->active_planes 0
PARAM_VALUE 0 crtc_state->alpm_state.io_wake_lines 0
PARAM_VALUE 0 crtc_state->async_flip_planes 0
PARAM_VALUE 0 crtc_state->bw_constrained 0
PARAM_VALUE 0 crtc_state->c8_planes 0
PARAM_VALUE 0 crtc_state->clock_set 0
PARAM_VALUE 0 crtc_state->cmrr.cmrr_m 0
PARAM_VALUE 0 crtc_state->cmrr.cmrr_n 0
PARAM_VALUE 0 crtc_state->cmrr.enable 0
PARAM_VALUE 0 crtc_state->crc_enabled 0
PARAM_VALUE 0 crtc_state->disable_cxsr 0
PARAM_VALUE 0 crtc_state->dither 0
PARAM_VALUE 0 crtc_state->dither_force_disable 0
PARAM_VALUE 0 crtc_state->do_async_flip 0
PARAM_VALUE 0 crtc_state->dp_m2_n2.data_m 0
PARAM_VALUE 0 crtc_state->dp_m2_n2.data_n 0
PARAM_VALUE 0 crtc_state->dp_m2_n2.link_m 0
PARAM_VALUE 0 crtc_state->dp_m2_n2.link_n 0
PARAM_VALUE 0 crtc_state->dp_m2_n2.tu 0
PARAM_VALUE 0 crtc_state->dp_m_n.data_m 0
PARAM_VALUE 0 crtc_state->dp_m_n.data_n 0
PARAM_VALUE 0 crtc_state->dp_m_n.link_m 0
PARAM_VALUE 0 crtc_state->dp_m_n.link_n 0
PARAM_VALUE 0 crtc_state->dp_m_n.tu 0
PARAM_VALUE 0 crtc_state->dp_tunnel_ref.tracker 0
PARAM_VALUE 0 crtc_state->dp_tunnel_ref.tunnel 0
PARAM_VALUE 0 crtc_state->dpll.dot 0
PARAM_VALUE 0 crtc_state->dpll.m 0
PARAM_VALUE 0 crtc_state->dpll.m1 0
PARAM_VALUE 0 crtc_state->dpll.m2 0
PARAM_VALUE 0 crtc_state->dpll.n 0
PARAM_VALUE 0 crtc_state->dpll.p 0
PARAM_VALUE 0 crtc_state->dpll.p1 0
PARAM_VALUE 0 crtc_state->dpll.p2 0
PARAM_VALUE 0 crtc_state->dpll.vco 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.bxt.ebb0 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.bxt.ebb4 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.bxt.pll0 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.bxt.pll1 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.bxt.pll10 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.bxt.pll2 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.bxt.pll3 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.bxt.pll6 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.bxt.pll8 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.bxt.pll9 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.hsw.spll 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.hsw.wrpll 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.i9xx.dpll 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.i9xx.dpll_md 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.i9xx.fp0 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.i9xx.fp1 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.icl.cfgcr0 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.icl.cfgcr1 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.icl.div0 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.skl.cfgcr1 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.skl.cfgcr2 0
PARAM_VALUE 0 crtc_state->dpll_hw_state.skl.ctrl1 0
PARAM_VALUE 0 crtc_state->dsb_color 0
PARAM_VALUE 0 crtc_state->dsb_commit 0
PARAM_VALUE 0 crtc_state->dsc.config.mux_word_size 0
PARAM_VALUE 0 crtc_state->dsc.config.rc_bits 0
PARAM_VALUE 0 crtc_state->dsc.config.slice_count 0
PARAM_VALUE 0 crtc_state->dsi_pll.ctrl 0
PARAM_VALUE 0 crtc_state->dsi_pll.div 0
PARAM_VALUE 0 crtc_state->enable_psr2_sel_fetch 0
PARAM_VALUE 0 crtc_state->enable_psr2_su_region_et 0
PARAM_VALUE 0 crtc_state->enabled_planes 0
PARAM_VALUE 0 crtc_state->enhanced_framing 0
PARAM_VALUE 0 crtc_state->entry_setup_frames 0
PARAM_VALUE 0 crtc_state->fb_bits 0
PARAM_VALUE 0 crtc_state->fdi_lanes 0-1
PARAM_VALUE 0 crtc_state->fdi_m_n.data_m 0-16777215
PARAM_VALUE 0 crtc_state->fdi_m_n.data_n 0-16777215
PARAM_VALUE 0 crtc_state->fdi_m_n.link_m 0-16777215
PARAM_VALUE 0 crtc_state->fdi_m_n.link_n 0-16777215
PARAM_VALUE 0 crtc_state->fec_enable 0
PARAM_VALUE 0 crtc_state->fifo_changed 0
PARAM_VALUE 0 crtc_state->gmch_pfit.control 0
PARAM_VALUE 0 crtc_state->gmch_pfit.pgm_ratios 0
PARAM_VALUE 0 crtc_state->has_audio 0
PARAM_VALUE 0 crtc_state->has_drrs 0
PARAM_VALUE 0 crtc_state->has_hdmi_sink 0
PARAM_VALUE 0 crtc_state->has_infoframe 0
PARAM_VALUE 0 crtc_state->has_lobf 0
PARAM_VALUE 0 crtc_state->has_panel_replay 0
PARAM_VALUE 0 crtc_state->has_psr 0
PARAM_VALUE 0 crtc_state->has_sel_update 0
PARAM_VALUE 0 crtc_state->hdmi_scrambling 0
PARAM_VALUE 0 crtc_state->hsw_workaround_pipe (-1)
PARAM_VALUE 0 crtc_state->hw.active 0
PARAM_VALUE 0 crtc_state->hw.adjusted_mode.clock 0
PARAM_VALUE 0 crtc_state->hw.adjusted_mode.flags 0
PARAM_VALUE 0 crtc_state->hw.adjusted_mode.hskew 0
PARAM_VALUE 0 crtc_state->hw.adjusted_mode.htotal 0
PARAM_VALUE 0 crtc_state->hw.adjusted_mode.status 0
PARAM_VALUE 0 crtc_state->hw.adjusted_mode.type 0
PARAM_VALUE 0 crtc_state->hw.adjusted_mode.vdisplay 0
PARAM_VALUE 0 crtc_state->hw.adjusted_mode.vscan 0
PARAM_VALUE 0 crtc_state->hw.adjusted_mode.vsync_end 0
PARAM_VALUE 0 crtc_state->hw.adjusted_mode.vtotal 0
PARAM_VALUE 0 crtc_state->hw.background_color 0-1073741823
PARAM_VALUE 0 crtc_state->hw.ctm 0
PARAM_VALUE 0 crtc_state->hw.degamma_lut 0
PARAM_VALUE 0 crtc_state->hw.gamma_lut 0
PARAM_VALUE 0 crtc_state->hw.mode.clock 0
PARAM_VALUE 0 crtc_state->hw.mode.crtc_clock 0
PARAM_VALUE 0 crtc_state->hw.mode.crtc_hblank_end 0
PARAM_VALUE 0 crtc_state->hw.mode.crtc_hdisplay 0
PARAM_VALUE 0 crtc_state->hw.mode.crtc_hskew 0
PARAM_VALUE 0 crtc_state->hw.mode.crtc_hsync_end 0
PARAM_VALUE 0 crtc_state->hw.mode.crtc_hsync_start 0
PARAM_VALUE 0 crtc_state->hw.mode.crtc_htotal 0
PARAM_VALUE 0 crtc_state->hw.mode.crtc_vblank_end 0
PARAM_VALUE 0 crtc_state->hw.mode.crtc_vdisplay 0
PARAM_VALUE 0 crtc_state->hw.mode.crtc_vsync_end 0
PARAM_VALUE 0 crtc_state->hw.mode.crtc_vsync_start 0
PARAM_VALUE 0 crtc_state->hw.mode.crtc_vtotal 0
PARAM_VALUE 0 crtc_state->hw.mode.flags 0
PARAM_VALUE 0 crtc_state->hw.mode.hdisplay 0
PARAM_VALUE 0 crtc_state->hw.mode.head.next 0
PARAM_VALUE 0 crtc_state->hw.mode.head.prev 0
PARAM_VALUE 0 crtc_state->hw.mode.height_mm 0
PARAM_VALUE 0 crtc_state->hw.mode.hskew 0
PARAM_VALUE 0 crtc_state->hw.mode.hsync_end 0
PARAM_VALUE 0 crtc_state->hw.mode.hsync_start 0
PARAM_VALUE 0 crtc_state->hw.mode.htotal 0
PARAM_VALUE 0 crtc_state->hw.mode.status 0
PARAM_VALUE 0 crtc_state->hw.mode.type 0
PARAM_VALUE 0 crtc_state->hw.mode.vdisplay 0
PARAM_VALUE 0 crtc_state->hw.mode.vscan 0
PARAM_VALUE 0 crtc_state->hw.mode.vsync_end 0
PARAM_VALUE 0 crtc_state->hw.mode.vsync_start 0
PARAM_VALUE 0 crtc_state->hw.mode.vtotal 0
PARAM_VALUE 0 crtc_state->hw.mode.width_mm 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.clock 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.crtc_clock 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.crtc_hdisplay 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.crtc_hskew 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.crtc_htotal 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.crtc_vdisplay 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.crtc_vtotal 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.flags 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.hdisplay 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.head.next 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.head.prev 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.height_mm 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.hskew 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.hsync_end 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.hsync_start 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.htotal 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.status 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.type 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.vdisplay 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.vscan 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.vsync_end 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.vsync_start 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.vtotal 0
PARAM_VALUE 0 crtc_state->hw.pipe_mode.width_mm 0
PARAM_VALUE 0 crtc_state->hw.scaling_filter 0
PARAM_VALUE 0 crtc_state->hw.sharpness_strength 0
PARAM_VALUE 0 crtc_state->infoframes.as_sdp.length 0
PARAM_VALUE 0 crtc_state->infoframes.as_sdp.mode 0
PARAM_VALUE 0 crtc_state->infoframes.as_sdp.vtotal 0
PARAM_VALUE 0 crtc_state->infoframes.avi.any.type 0
PARAM_VALUE 0 crtc_state->infoframes.avi.avi.itc 0
PARAM_VALUE 0 crtc_state->infoframes.avi.avi.nups 0
PARAM_VALUE 0 crtc_state->infoframes.avi.avi.type 0
PARAM_VALUE 0 crtc_state->infoframes.avi.drm.eotf 0
PARAM_VALUE 0 crtc_state->infoframes.avi.drm.type 0
PARAM_VALUE 0 crtc_state->infoframes.avi.spd.sdi 0
PARAM_VALUE 0 crtc_state->infoframes.avi.spd.type 0
PARAM_VALUE 0 crtc_state->infoframes.drm.any.type 0
PARAM_VALUE 0 crtc_state->infoframes.drm.avi.itc 0
PARAM_VALUE 0 crtc_state->infoframes.drm.avi.nups 0
PARAM_VALUE 0 crtc_state->infoframes.drm.avi.type 0
PARAM_VALUE 0 crtc_state->infoframes.drm.drm.eotf 0
PARAM_VALUE 0 crtc_state->infoframes.drm.drm.type 0
PARAM_VALUE 0 crtc_state->infoframes.drm.spd.sdi 0
PARAM_VALUE 0 crtc_state->infoframes.drm.spd.type 0
PARAM_VALUE 0 crtc_state->infoframes.enable 0
PARAM_VALUE 0 crtc_state->infoframes.gcp 0
PARAM_VALUE 0 crtc_state->infoframes.hdmi.any.type 0
PARAM_VALUE 0 crtc_state->infoframes.hdmi.avi.itc 0
PARAM_VALUE 0 crtc_state->infoframes.hdmi.avi.nups 0
PARAM_VALUE 0 crtc_state->infoframes.hdmi.avi.type 0
PARAM_VALUE 0 crtc_state->infoframes.hdmi.drm.eotf 0
PARAM_VALUE 0 crtc_state->infoframes.hdmi.drm.type 0
PARAM_VALUE 0 crtc_state->infoframes.hdmi.spd.sdi 0
PARAM_VALUE 0 crtc_state->infoframes.hdmi.spd.type 0
PARAM_VALUE 0 crtc_state->infoframes.spd.any.type 0
PARAM_VALUE 0 crtc_state->infoframes.spd.avi.itc 0
PARAM_VALUE 0 crtc_state->infoframes.spd.avi.nups 0
PARAM_VALUE 0 crtc_state->infoframes.spd.avi.type 0
PARAM_VALUE 0 crtc_state->infoframes.spd.drm.eotf 0
PARAM_VALUE 0 crtc_state->infoframes.spd.drm.type 0
PARAM_VALUE 0 crtc_state->infoframes.spd.spd.sdi 0
PARAM_VALUE 0 crtc_state->infoframes.spd.spd.type 0
PARAM_VALUE 0 crtc_state->infoframes.vsc.bpc 0
PARAM_VALUE 0 crtc_state->infoframes.vsc.length 0
PARAM_VALUE 0 crtc_state->infoframes.vsc.revision 0
PARAM_VALUE 0 crtc_state->infoframes.vsc.sdp_type 0
PARAM_VALUE 0 crtc_state->inherited 0
PARAM_VALUE 0 crtc_state->intel_dpll 0,4096-ptr_max
PARAM_VALUE 0 crtc_state->intel_dpll->info 4096-ptr_max
PARAM_VALUE 0 crtc_state->ips_enabled 0
PARAM_VALUE 0 crtc_state->ips_linetime 0
PARAM_VALUE 0 crtc_state->lane_count 0
PARAM_VALUE 0 crtc_state->lane_lat_optim_mask 0
PARAM_VALUE 0 crtc_state->linetime 0
PARAM_VALUE 0 crtc_state->master_transcoder (-1)
PARAM_VALUE 0 crtc_state->max_link_bpp_x16 s32max
PARAM_VALUE 0 crtc_state->max_pipe_bpp 0
PARAM_VALUE 0 crtc_state->min_cdclk 0
PARAM_VALUE 0 crtc_state->min_hblank 0
PARAM_VALUE 0 crtc_state->min_voltage_level 0
PARAM_VALUE 0 crtc_state->mode_flags 0
PARAM_VALUE 0 crtc_state->mst_master_transcoder (-1)
PARAM_VALUE 0 crtc_state->no_psr_reason 0
PARAM_VALUE 0 crtc_state->nv12_planes 0
PARAM_VALUE 0 crtc_state->output_format 0,2
PARAM_VALUE 0 crtc_state->output_types 0
PARAM_VALUE 0 crtc_state->panel_replay_dsc_support 0
PARAM_VALUE 0 crtc_state->pch_pfit.casf.enable 0
PARAM_VALUE 0 crtc_state->pch_pfit.casf.strength 0
PARAM_VALUE 0 crtc_state->pch_pfit.casf.win_size 0
PARAM_VALUE 0 crtc_state->pch_pfit.dst.x1 0
PARAM_VALUE 0 crtc_state->pch_pfit.dst.x2 0
PARAM_VALUE 0 crtc_state->pch_pfit.dst.y1 0
PARAM_VALUE 0 crtc_state->pch_pfit.dst.y2 0
PARAM_VALUE 0 crtc_state->pch_pfit.enabled 0
PARAM_VALUE 0 crtc_state->pipe_bpp 0,18,24,30,36
PARAM_VALUE 0 crtc_state->pipe_src.x1 0
PARAM_VALUE 0 crtc_state->pipe_src.x2 0
PARAM_VALUE 0 crtc_state->pipe_src.y1 0
PARAM_VALUE 0 crtc_state->pipe_src.y2 0
PARAM_VALUE 0 crtc_state->pipe_srcsz_early_tpt 0
PARAM_VALUE 0 crtc_state->pixel_multiplier 0-1
PARAM_VALUE 0 crtc_state->pixel_rate 0
PARAM_VALUE 0 crtc_state->pkg_c_latency_used 0
PARAM_VALUE 0 crtc_state->plane_color_changed 0
PARAM_VALUE 0 crtc_state->post_csc_lut 0,4096-ptr_max
PARAM_VALUE 0 crtc_state->post_csc_lut->base.id 0-s32max
PARAM_VALUE 0 crtc_state->post_csc_lut->base.type 3149642683
PARAM_VALUE 0 crtc_state->post_csc_lut->head_file.next 72,4096-ptr_max
PARAM_VALUE 0 crtc_state->post_csc_lut->head_file.next->next 72,4096-ptr_max
PARAM_VALUE 0 crtc_state->post_csc_lut->head_file.prev 72,4096-ptr_max
PARAM_VALUE 0 crtc_state->post_csc_lut->head_file.prev->next 72,4096-ptr_max
PARAM_VALUE 0 crtc_state->post_csc_lut->head_file.prev->prev 72,4096-ptr_max
PARAM_VALUE 0 crtc_state->post_csc_lut->head_global.next 4096-ptr_max
PARAM_VALUE 0 crtc_state->post_csc_lut->length 1032,2048,4096,8192,2097160
PARAM_VALUE 0 crtc_state->pre_csc_lut 0,4096-ptr_max
PARAM_VALUE 0 crtc_state->pre_csc_lut->base.id 0-s32max
PARAM_VALUE 0 crtc_state->pre_csc_lut->base.type 3149642683
PARAM_VALUE 0 crtc_state->pre_csc_lut->head_file.next 72,4096-ptr_max
PARAM_VALUE 0 crtc_state->pre_csc_lut->head_file.next->next 72,4096-ptr_max
PARAM_VALUE 0 crtc_state->pre_csc_lut->head_file.prev 72,4096-ptr_max
PARAM_VALUE 0 crtc_state->pre_csc_lut->head_file.prev->next 72,4096-ptr_max
PARAM_VALUE 0 crtc_state->pre_csc_lut->head_file.prev->prev 72,4096-ptr_max
PARAM_VALUE 0 crtc_state->pre_csc_lut->head_global.next 4096-ptr_max
PARAM_VALUE 0 crtc_state->pre_csc_lut->length 264,1032,4096,8192
PARAM_VALUE 0 crtc_state->preload_luts 0
PARAM_VALUE 0 crtc_state->psr2_man_track_ctl 0
PARAM_VALUE 0 crtc_state->psr2_su_area.x1 0
PARAM_VALUE 0 crtc_state->psr2_su_area.x2 0
PARAM_VALUE 0 crtc_state->psr2_su_area.y1 0
PARAM_VALUE 0 crtc_state->psr2_su_area.y2 0
PARAM_VALUE 0 crtc_state->quirks 0
PARAM_VALUE 0 crtc_state->scaled_planes 0
PARAM_VALUE 0 crtc_state->scaler_state.scaler_id (-1)
PARAM_VALUE 0 crtc_state->scaler_state.scaler_users 0
PARAM_VALUE 0 crtc_state->sdp_split_enable 0
PARAM_VALUE 0 crtc_state->sdvo_tv_clock 0
PARAM_VALUE 0 crtc_state->set_context_latency 0
PARAM_VALUE 0 crtc_state->sink_format 0,2
PARAM_VALUE 0 crtc_state->splitter.enable 0
PARAM_VALUE 0 crtc_state->splitter.link_count 0
PARAM_VALUE 0 crtc_state->splitter.pixel_overlap 0
PARAM_VALUE 0 crtc_state->su_y_granularity 0
PARAM_VALUE 0 crtc_state->sync_mode_slaves_mask 0
PARAM_VALUE 0 crtc_state->uapi.active 0
PARAM_VALUE 0 crtc_state->uapi.active_changed 0
PARAM_VALUE 0 crtc_state->uapi.adjusted_mode.clock 0
PARAM_VALUE 0 crtc_state->uapi.adjusted_mode.flags 0
PARAM_VALUE 0 crtc_state->uapi.adjusted_mode.hskew 0
PARAM_VALUE 0 crtc_state->uapi.adjusted_mode.type 0
PARAM_VALUE 0 crtc_state->uapi.adjusted_mode.vscan 0
PARAM_VALUE 0 crtc_state->uapi.async_flip 0
PARAM_VALUE 0 crtc_state->uapi.background_color 18446462598732840960
PARAM_VALUE 0 crtc_state->uapi.color_mgmt_changed 0
PARAM_VALUE 0 crtc_state->uapi.commit 0
PARAM_VALUE 0 crtc_state->uapi.connector_mask 0
PARAM_VALUE 0 crtc_state->uapi.connectors_changed 0
PARAM_VALUE 0 crtc_state->uapi.crtc 4096-ptr_max
PARAM_VALUE 0 crtc_state->uapi.ctm 0
PARAM_VALUE 0 crtc_state->uapi.degamma_lut 0
PARAM_VALUE 0 crtc_state->uapi.enable 0
PARAM_VALUE 0 crtc_state->uapi.encoder_mask 0
PARAM_VALUE 0 crtc_state->uapi.event 0
PARAM_VALUE 0 crtc_state->uapi.gamma_lut 0
PARAM_VALUE 0 crtc_state->uapi.mode.clock 0
PARAM_VALUE 0 crtc_state->uapi.mode.crtc_clock 0
PARAM_VALUE 0 crtc_state->uapi.mode.crtc_hdisplay 0
PARAM_VALUE 0 crtc_state->uapi.mode.crtc_hskew 0
PARAM_VALUE 0 crtc_state->uapi.mode.crtc_hsync_end 0
PARAM_VALUE 0 crtc_state->uapi.mode.crtc_htotal 0
PARAM_VALUE 0 crtc_state->uapi.mode.crtc_vdisplay 0
PARAM_VALUE 0 crtc_state->uapi.mode.crtc_vsync_end 0
PARAM_VALUE 0 crtc_state->uapi.mode.crtc_vtotal 0
PARAM_VALUE 0 crtc_state->uapi.mode.flags 0
PARAM_VALUE 0 crtc_state->uapi.mode.hdisplay 0
PARAM_VALUE 0 crtc_state->uapi.mode.head.next 0
PARAM_VALUE 0 crtc_state->uapi.mode.head.prev 0
PARAM_VALUE 0 crtc_state->uapi.mode.height_mm 0
PARAM_VALUE 0 crtc_state->uapi.mode.hskew 0
PARAM_VALUE 0 crtc_state->uapi.mode.hsync_end 0
PARAM_VALUE 0 crtc_state->uapi.mode.hsync_start 0
PARAM_VALUE 0 crtc_state->uapi.mode.htotal 0
PARAM_VALUE 0 crtc_state->uapi.mode.status 0
PARAM_VALUE 0 crtc_state->uapi.mode.type 0
PARAM_VALUE 0 crtc_state->uapi.mode.vdisplay 0
PARAM_VALUE 0 crtc_state->uapi.mode.vscan 0
PARAM_VALUE 0 crtc_state->uapi.mode.vsync_end 0
PARAM_VALUE 0 crtc_state->uapi.mode.vsync_start 0
PARAM_VALUE 0 crtc_state->uapi.mode.vtotal 0
PARAM_VALUE 0 crtc_state->uapi.mode.width_mm 0
PARAM_VALUE 0 crtc_state->uapi.mode_blob 0
PARAM_VALUE 0 crtc_state->uapi.mode_changed 0
PARAM_VALUE 0 crtc_state->uapi.no_vblank 0
PARAM_VALUE 0 crtc_state->uapi.plane_mask 0
PARAM_VALUE 0 crtc_state->uapi.planes_changed 0
PARAM_VALUE 0 crtc_state->uapi.scaling_filter 0
PARAM_VALUE 0 crtc_state->uapi.self_refresh_active 0
PARAM_VALUE 0 crtc_state->uapi.sharpness_strength 0
PARAM_VALUE 0 crtc_state->uapi.state 0
PARAM_VALUE 0 crtc_state->uapi.target_vblank 0
PARAM_VALUE 0 crtc_state->uapi.vrr_enabled 0
PARAM_VALUE 0 crtc_state->uapi.zpos_changed 0
PARAM_VALUE 0 crtc_state->update_lrr 0
PARAM_VALUE 0 crtc_state->update_m_n 0
PARAM_VALUE 0 crtc_state->update_pipe 0
PARAM_VALUE 0 crtc_state->update_planes 0
PARAM_VALUE 0 crtc_state->update_wm_post 0
PARAM_VALUE 0 crtc_state->update_wm_pre 0
PARAM_VALUE 0 crtc_state->use_dsb 0
PARAM_VALUE 0 crtc_state->use_flipq 0
PARAM_VALUE 0 crtc_state->vblank_work.base.func 0
PARAM_VALUE 0 crtc_state->vblank_work.base.worker 0
PARAM_VALUE 0 crtc_state->vblank_work.cancelling 0
PARAM_VALUE 0 crtc_state->vblank_work.count 0
PARAM_VALUE 0 crtc_state->vblank_work.node.next 0
PARAM_VALUE 0 crtc_state->vblank_work.node.prev 0
PARAM_VALUE 0 crtc_state->vblank_work.vblank 0
PARAM_VALUE 0 crtc_state->vrr.dc_balance.enable 0
PARAM_VALUE 0 crtc_state->vrr.dc_balance.guardband 0
PARAM_VALUE 0 crtc_state->vrr.dc_balance.slope 0
PARAM_VALUE 0 crtc_state->vrr.dc_balance.vmax 0
PARAM_VALUE 0 crtc_state->vrr.dc_balance.vmin 0
PARAM_VALUE 0 crtc_state->vrr.enable 0
PARAM_VALUE 0 crtc_state->vrr.flipline 0
PARAM_VALUE 0 crtc_state->vrr.guardband 0
PARAM_VALUE 0 crtc_state->vrr.in_range 0
PARAM_VALUE 0 crtc_state->vrr.pipeline_full 0
PARAM_VALUE 0 crtc_state->vrr.vmax 0
PARAM_VALUE 0 crtc_state->vrr.vmin 0
PARAM_VALUE 0 crtc_state->vrr.vsync_end 0
PARAM_VALUE 0 crtc_state->vrr.vsync_start 0
PARAM_VALUE 0 crtc_state->wm.g4x.intermediate.cxsr 0
PARAM_VALUE 0 crtc_state->wm.g4x.optimal.cxsr 0
PARAM_VALUE 0 crtc_state->wm.g4x.optimal.fbc_en 0
PARAM_VALUE 0 crtc_state->wm.g4x.optimal.hpll.fbc 0
PARAM_VALUE 0 crtc_state->wm.g4x.optimal.hpll_en 0
PARAM_VALUE 0 crtc_state->wm.g4x.optimal.sr.cursor 0
PARAM_VALUE 0 crtc_state->wm.g4x.optimal.sr.fbc 0
PARAM_VALUE 0 crtc_state->wm.g4x.optimal.sr.plane 0
PARAM_VALUE 0 crtc_state->wm.g4x.optimal.wm.fbc 0
PARAM_VALUE 0 crtc_state->wm.need_postvbl_update 0
PARAM_VALUE 0 crtc_state->wm.skl.ddb.end 0
PARAM_VALUE 0 crtc_state->wm.skl.ddb.start 0
PARAM_VALUE 0 crtc_state->wm.skl.raw.use_sagv_wm 0
PARAM_VALUE 0 crtc_state->wm.vlv.intermediate.cxsr 0
PARAM_VALUE 0 crtc_state->wm.vlv.optimal.cxsr 0
PARAM_VALUE 0 crtc_state->wm_level_disabled 0
DATA_SOURCE 0 crtc_state $1
FUZZY_MAX 0 crtc_state->output_format 2
FUZZY_MAX 0 crtc_state->pipe_bpp 36
BIT_INFO 0 crtc_state->output_format 0x0,0x2
BIT_INFO 0 crtc_state->pipe_bpp 0x0,0x3e
BIT_INFO 0 crtc_state->sink_format 0x0,0x2
HARD_MAX 0 crtc_state->output_format 2
HARD_MAX 0 crtc_state->pipe_bpp 36
HARD_MAX 0 crtc_state->pixel_multiplier 1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 crtc_state->cgm_mode 0-u32max
HOST_DATA 0 crtc_state->csc_mode 0-u32max
HOST_DATA 0 crtc_state->double_wide 0-1
HOST_DATA 0 crtc_state->dsc.config.block_pred_enable 0-1
HOST_DATA 0 crtc_state->dsc.config.convert_rgb 0-1
HOST_DATA 0 crtc_state->dsc.config.native_422 0-1
HOST_DATA 0 crtc_state->dsc.config.simple_422 0-1
HOST_DATA 0 crtc_state->dsc.config.vbr_enable 0-1
HOST_DATA 0 crtc_state->fdi_m_n.data_m 0-16777215
HOST_DATA 0 crtc_state->fdi_m_n.data_n 0-16777215
HOST_DATA 0 crtc_state->fdi_m_n.link_m 0-16777215
HOST_DATA 0 crtc_state->fdi_m_n.link_n 0-16777215
HOST_DATA 0 crtc_state->gamma_mode 0-u32max
HOST_DATA 0 crtc_state->hw.adjusted_mode.crtc_clock 0-s32max[c]
HOST_DATA 0 crtc_state->hw.background_color 0-1073741823
HOST_DATA 0 crtc_state->msa_timing_delay 0-255[c]
NO_OVERFLOW_SIMPLE 0 crtc_state->post_csc_lut->dev->num_crtcs
NO_OVERFLOW_SIMPLE 0 crtc_state->pre_csc_lut->dev->num_crtcs