Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_lt_phy.c intel_lt_phy_config_changed() -> intel_lt_phy_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3074
DATA_SOURCE 0 encoder $0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &display->dpll.lock
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct intel_dpll_global)->lock

drivers/gpu/drm/i915/display/intel_lt_phy.c intel_lt_phy_pll_enable() -> intel_lt_phy_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3268
DATA_SOURCE 0 encoder $0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &display->dpll.lock
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct intel_dpll_global)->lock

drivers/gpu/drm/i915/display/intel_lt_phy.c intel_lt_phy_pll_readout_hw_state() -> intel_lt_phy_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3074
DATA_SOURCE 0 encoder $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &display->dpll.lock
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_lt_phy.c intel_lt_phy_pll_readout_hw_state() -> intel_lt_phy_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3075
DATA_SOURCE 0 encoder $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &display->dpll.lock
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_lt_phy.c intel_lt_phy_pll_readout_hw_state() -> intel_lt_phy_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3267
DATA_SOURCE 0 encoder $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &display->dpll.lock
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_lt_phy.c intel_lt_phy_pll_readout_hw_state() -> intel_lt_phy_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3078-3153
DATA_SOURCE 0 encoder $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &display->dpll.lock
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex