Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 2 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_hdmi.c hdmi_bpc_possible() -> intel_hdmi_bpc_possible()

Type Parameter Key Value
PARAM_VALUE 0 crtc_state 4096-ptr_max
PARAM_VALUE 0 crtc_state->framestart_delay 1
PARAM_VALUE 0 crtc_state->hw.adjusted_mode.flags 0,4-u32max
PARAM_VALUE 0 crtc_state->output_format 0-1
PARAM_VALUE 0 crtc_state->pipe_bpp 18-134217727
PARAM_VALUE 0 crtc_state->pipe_src.x1 0
PARAM_VALUE 0 crtc_state->pipe_src.x2 0-u16max
PARAM_VALUE 0 crtc_state->pipe_src.y1 0
PARAM_VALUE 0 crtc_state->pipe_src.y2 0-u16max
PARAM_VALUE 0 crtc_state->pixel_multiplier 1-2
PARAM_VALUE 0 crtc_state->port_clock 0
PARAM_VALUE 0 crtc_state->sink_format 0-1
PARAM_VALUE 0 crtc_state->uapi.crtc 4096-ptr_max
PARAM_VALUE 0 *crtc_state->eld 0-255
PARAM_VALUE 1 bpc 8,10,12
CAPPED_DATA 0 crtc_state->pipe_bpp 1
DATA_SOURCE 0 crtc_state $0
DATA_SOURCE 1 bpc $1
FUZZY_MAX 0 crtc_state->pixel_multiplier 2
HARD_MAX 0 crtc_state->pixel_multiplier 2
HARD_MAX 0 crtc_state->sink_format 1
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 crtc_state->hw.adjusted_mode.crtc_clock
HALF_LOCKED2 &_state->dev->mode_config.connection_mutex
HALF_LOCKED2 &_state->dev->mode_config.connection_mutex.mutex
HALF_LOCKED2 &client->modeset_mutex
HALF_LOCKED2 &dev->mode_config.connection_mutex
HALF_LOCKED2 &dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/i915/display/intel_dp.c intel_dp_hdmi_compute_bpc() -> intel_hdmi_bpc_possible()

Type Parameter Key Value
PARAM_VALUE 0 crtc_state 4096-ptr_max
PARAM_VALUE 0 crtc_state->dsc.compressed_bpp_x16 0
PARAM_VALUE 0 crtc_state->dsc.compression_enable 0
PARAM_VALUE 0 crtc_state->dsc.config.bits_per_pixel 0
PARAM_VALUE 0 crtc_state->dsc.config.convert_rgb 0
PARAM_VALUE 0 crtc_state->dsc.config.final_offset 0
PARAM_VALUE 0 crtc_state->dsc.config.flatness_max_qp 0
PARAM_VALUE 0 crtc_state->dsc.config.flatness_min_qp 0
PARAM_VALUE 0 crtc_state->dsc.config.initial_offset 0
PARAM_VALUE 0 crtc_state->dsc.config.line_buf_depth 0
PARAM_VALUE 0 crtc_state->dsc.config.mux_word_size 0
PARAM_VALUE 0 crtc_state->dsc.config.native_420 0
PARAM_VALUE 0 crtc_state->dsc.config.native_422 0
PARAM_VALUE 0 crtc_state->dsc.config.nfl_bpg_offset 0
PARAM_VALUE 0 crtc_state->dsc.config.nsl_bpg_offset 0
PARAM_VALUE 0 crtc_state->dsc.config.pic_height 0
PARAM_VALUE 0 crtc_state->dsc.config.pic_width 0
PARAM_VALUE 0 crtc_state->dsc.config.rc_bits 0
PARAM_VALUE 0 crtc_state->dsc.config.rc_edge_factor 0
PARAM_VALUE 0 crtc_state->dsc.config.rc_model_size 0
PARAM_VALUE 0 crtc_state->dsc.config.simple_422 0
PARAM_VALUE 0 crtc_state->dsc.config.slice_count 0
PARAM_VALUE 0 crtc_state->dsc.config.slice_height 0
PARAM_VALUE 0 crtc_state->dsc.config.slice_width 0
PARAM_VALUE 0 crtc_state->dsc.config.vbr_enable 0
PARAM_VALUE 0 crtc_state->output_format 0-2
PARAM_VALUE 0 crtc_state->sink_format 0-1
PARAM_VALUE 1 bpc 8-s32max
CAPPED_DATA 0 crtc_state->sink_format 1
DATA_SOURCE 0 crtc_state $1
DATA_SOURCE 1 bpc $2 [m]
FUZZY_MAX 1 bpc 8
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 crtc_state->clock