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Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 3 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_fdi.c ilk_fdi_compute_config() -> intel_fdi_link_freq()

Type Parameter Key Value
PARAM_VALUE 1 pipe_config 4096-ptr_max
DATA_SOURCE 1 pipe_config $1
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_modeset_verify.c intel_pipe_config_sanity_check() -> intel_fdi_link_freq()

Type Parameter Key Value
PARAM_VALUE 1 pipe_config 4096-ptr_max
BUF_SIZE 1 pipe_config 4832
DATA_SOURCE 1 pipe_config $0
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 1 pipe_config->cgm_mode 0-u32max
HOST_DATA 1 pipe_config->csc_mode 0-u32max
HOST_DATA 1 pipe_config->dsc.config.block_pred_enable 0-1
HOST_DATA 1 pipe_config->dsc.config.convert_rgb 0-1
HOST_DATA 1 pipe_config->dsc.config.native_422 0-1
HOST_DATA 1 pipe_config->dsc.config.simple_422 0-1
HOST_DATA 1 pipe_config->dsc.config.vbr_enable 0-1
HOST_DATA 1 pipe_config->fdi_m_n.link_n 0-16777215
HOST_DATA 1 pipe_config->gamma_mode 0-u32max
HOST_DATA 1 pipe_config->gmch_pfit.pgm_ratios 0-u32max
HOST_DATA 1 pipe_config->hw.adjusted_mode.clock 0[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.crtc_clock 0-s32max[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.crtc_vblank_start 0-u16max
HOST_DATA 1 pipe_config->hw.adjusted_mode.hdisplay 0[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.hsync_end 0[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.hsync_start 0[c]
HOST_DATA 1 pipe_config->hw.adjusted_mode.htotal 0[c]
HOST_DATA 1 pipe_config->hw.background_color 0-1073741823
HOST_DATA 1 pipe_config->hw.mode.clock s32min-s32max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_clock s32min-s32max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hblank_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hblank_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hdisplay 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hsync_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_hsync_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_htotal 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.crtc_vblank_start 0-u16max
HOST_DATA 1 pipe_config->hw.mode.hsync_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.hsync_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.mode.htotal 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.clock s32min-s32max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_clock s32min-s32max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hblank_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hblank_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hdisplay 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hsync_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_hsync_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_htotal 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.crtc_vblank_start 0-u16max
HOST_DATA 1 pipe_config->hw.pipe_mode.hdisplay 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.hsync_end 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.hsync_start 0-u16max[c]
HOST_DATA 1 pipe_config->hw.pipe_mode.htotal 0-u16max[c]
HOST_DATA 1 pipe_config->ips_enabled 0-1
HOST_DATA 1 pipe_config->min_hblank 0-s32max
HOST_DATA 1 pipe_config->pixel_rate 0-u32max[c]
HOST_DATA 1 pipe_config->set_context_latency 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.guardband 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.max_decrease 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.max_increase 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.slope 0-u16max
HOST_DATA 1 pipe_config->vrr.dc_balance.vblank_target 0-u16max
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->mode_config.num_colorop
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->mode_config.num_crtc
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->mode_config.num_total_plane
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->num_crtcs
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->mode_config.num_colorop
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->mode_config.num_crtc
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->mode_config.num_total_plane
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->num_crtcs
HALF_LOCKED2 &pool->lock

drivers/gpu/drm/i915/display/intel_pch_display.c ilk_pch_clock_get() -> intel_fdi_link_freq()

Type Parameter Key Value
PARAM_VALUE 1 pipe_config 4096-ptr_max
DATA_SOURCE 1 pipe_config $0
BIT_INFO 1 pipe_config->output_format 0x0,0x2
BIT_INFO 1 pipe_config->pipe_bpp 0x0,0x3e
BIT_INFO 1 pipe_config->sink_format 0x0,0x2
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 1 pipe_config->cgm_mode 0-u32max
HOST_DATA 1 pipe_config->csc_mode 0-u32max
HOST_DATA 1 pipe_config->dpll_hw_state.i9xx.dpll 0
HOST_DATA 1 pipe_config->dpll_hw_state.i9xx.dpll_md 0
HOST_DATA 1 pipe_config->dpll_hw_state.i9xx.fp0 0
HOST_DATA 1 pipe_config->dpll_hw_state.i9xx.fp1 0
HOST_DATA 1 pipe_config->fdi_lanes 2-8[c]
HOST_DATA 1 pipe_config->fdi_m_n.data_m 0-16777215
HOST_DATA 1 pipe_config->fdi_m_n.data_n 0-16777215
HOST_DATA 1 pipe_config->fdi_m_n.link_m 0-16777215
HOST_DATA 1 pipe_config->fdi_m_n.link_n 0-16777215
HOST_DATA 1 pipe_config->gamma_mode 0-u32max
HOST_DATA 1 pipe_config->hw.background_color 0-1073741823
HOST_DATA 1 pipe_config->msa_timing_delay 0-255[c]
NO_OVERFLOW_SIMPLE 1 pipe_config->post_csc_lut->dev->num_crtcs
NO_OVERFLOW_SIMPLE 1 pipe_config->pre_csc_lut->dev->num_crtcs