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Documented in 1 files:

Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_dpll_mgr.c dkl_pll_write() -> intel_dkl_phy_posting_read()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->dkl.phy_lock.rlock.dep_map->name 0-255
PARAM_VALUE 0 display->dpll.lock.dep_map->name 0-255
PARAM_VALUE 0 display->dpll.lock.first_waiter 0,4096-ptr_max
PARAM_VALUE 0 display->dpll.lock.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 display->dpll.lock.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 display->dpll.lock.osq.tail.counter 0-s32max
PARAM_VALUE 0 display->dpll.lock.wait_lock.dep_map->name 0-255
PARAM_VALUE 0 display->dpll.lock.wait_lock.owner (-1)
PARAM_VALUE 0 display->dpll.lock.wait_lock.owner_cpu u32max
PARAM_VALUE 0 display->dpll.lock.wait_lock.raw_lock.val.counter 0-s32max
PARAM_VALUE 0 display->drm 0,4096-ptr_max
PARAM_VALUE 0 display->params.enable_dmc_wl 0-1
PARAM_VALUE 0 display->power.domains.power_wells->count s32min-s32max
PARAM_VALUE 0 display->power.domains.power_wells->hw_enabled 0-1
PARAM_VALUE 0 display->wl.work.timer.entry->pprev 4096-ptr_max
PARAM_VALUE 0 display->wl.work.work.entry.next->next 1-u64max
PARAM_VALUE 0 display->wl.work.work.entry.next->prev 4096-ptr_max
PARAM_VALUE 0 display->wl.work.work.entry.prev->next 1-u64max
PARAM_VALUE 0 display->wl.work.work.entry.prev->prev 1-u64max
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
DATA_SOURCE 0 display $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 display->drm->mode_config.connector_ida.xa.xa_flags 67108869
HOST_DATA 0 display->drm->mode_config.object_idr.idr_rt.xa_flags 0,4-u32max
HOST_DATA 0 display->drm->mode_config.tile_idr.idr_rt.xa_flags 0,67108864-u32max
HOST_DATA 0 display->drm->num_crtcs 2[c]
HOST_DATA 0 display->power.domains.dc_state 0-u32max
LOCK2 0 &display->dpll.lock
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct intel_dpll_global)->lock