Documented in 1 files:
Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 22 files:
- drivers/gpu/drm/i915/display/icl_dsi.c, line 408
- drivers/gpu/drm/i915/display/intel_audio.c, line 1063
- drivers/gpu/drm/i915/display/intel_cdclk.c
- drivers/gpu/drm/i915/display/intel_crt.c
- drivers/gpu/drm/i915/display/intel_cx0_phy.c, line 117
- drivers/gpu/drm/i915/display/intel_ddi.c
- drivers/gpu/drm/i915/display/intel_display.c, line 7550
- drivers/gpu/drm/i915/display/intel_display_debugfs.c, line 95
- drivers/gpu/drm/i915/display/intel_display_power.c
- drivers/gpu/drm/i915/display/intel_display_power.h, line 342
- drivers/gpu/drm/i915/display/intel_dmc.c, line 1336
- drivers/gpu/drm/i915/display/intel_dp_aux.c, line 287
- drivers/gpu/drm/i915/display/intel_dpll_mgr.c
- drivers/gpu/drm/i915/display/intel_gmbus.c
- drivers/gpu/drm/i915/display/intel_hdmi.c
- drivers/gpu/drm/i915/display/intel_hotplug.c, line 801
- drivers/gpu/drm/i915/display/intel_lt_phy.c, line 1300
- drivers/gpu/drm/i915/display/intel_modeset_setup.c, line 944
- drivers/gpu/drm/i915/display/intel_pps.c
- drivers/gpu/drm/i915/display/intel_psr.c, line 4135
- drivers/gpu/drm/i915/display/intel_tc.c
- drivers/gpu/drm/i915/gt/intel_gt_pm.c, line 90
Smatch caller information:
drivers/gpu/drm/i915/display/intel_cdclk.c chv_set_cdclk() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->cdclk.funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | display->cdclk.funcs->set_cdclk | 981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232 |
| PARAM_VALUE | 0 | display->drm | 0,4096-ptr_max |
| PARAM_VALUE | 0 | display->gmbus.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->gmbus.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | display->gmbus.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | display->gmbus.mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | display->gmbus.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | display->gmbus.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->gmbus.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | display->gmbus.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->next | 1-u64max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.prev->next | 1-u64max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.prev->prev | 1-u64max |
| PARAM_VALUE | 1 | domain | 0 |
| DATA_SOURCE | 0 | display | $0 |
| STR_LEN | 0 | display | 21-22 |
| STR_LEN | 0 | display | 21-22 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | 0 | &display->gmbus.mutex | |
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_display)->gmbus.mutex |
drivers/gpu/drm/i915/display/intel_cdclk.c vlv_set_cdclk() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->cdclk.funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | display->cdclk.funcs->set_cdclk | 981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232 |
| PARAM_VALUE | 0 | display->drm | 0,4096-ptr_max |
| PARAM_VALUE | 0 | display->gmbus.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->gmbus.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | display->gmbus.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | display->gmbus.mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | display->gmbus.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | display->gmbus.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->gmbus.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | display->gmbus.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work->timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->next | 1-u64max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.prev->next | 1-u64max |
| PARAM_VALUE | 0 | display->wl.work.work.entry.prev->prev | 1-u64max |
| PARAM_VALUE | 1 | domain | 0 |
| DATA_SOURCE | 0 | display | $0 |
| STR_LEN | 0 | display | 21-22 |
| STR_LEN | 0 | display | 21-22 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | 0 | &display->gmbus.mutex | |
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_display)->gmbus.mutex |
drivers/gpu/drm/i915/display/intel_hdmi.c intel_hdmi_detect() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->drm | 0,4096-ptr_max |
| PARAM_VALUE | 0 | display->opregion | 0,4096-ptr_max |
| PARAM_VALUE | 0 | display->opregion->header->over.major | 0-255 |
| PARAM_VALUE | 0 | display->params.disable_display | 0 |
| PARAM_VALUE | 1 | domain | 71 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &_connector->dev->mode_config.connection_mutex | ||
| HALF_LOCKED2 | &dev->mode_config.mutex | ||
| TYPE_LOCK | (struct drm_mode_config)->connection_mutex |
drivers/gpu/drm/i915/display/intel_hdmi.c intel_hdmi_set_edid() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 71 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &dev->mode_config.mutex |
drivers/gpu/drm/i915/display/icl_dsi.c get_dsi_io_power_domains() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 1 | domain | 29-30 |
| FUZZY_MAX | 1 | domain | 30 |
| BIT_INFO | 1 | domain | 0x1c,0x1f |
| HARD_MAX | 1 | domain | 30 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | display->dmc.dmc->dc6_allowed.dc5_start | 0-4294967295 |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
drivers/gpu/drm/i915/display/intel_audio.c intel_audio_component_get_power() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 46 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | _T->lock |
drivers/gpu/drm/i915/display/intel_modeset_setup.c intel_modeset_setup_hw_state() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->dpll.mgr->compare_hw_state | 1988828769907408896,4304445909437353984,5589390013801357312,7199724579178258432,7292826417019408384,7481167222828003328,8665324935750119424,9182544845536616448 |
| PARAM_VALUE | 0 | display->dpll.mgr->compute_dplls | 3278772287333720064,5266472627050582016,6060912680081088512,6216086186862542848,8471094383317381120,8614942105147809792,8986272695562289152,9022440569105731584 |
| PARAM_VALUE | 0 | display->dpll.mgr->dump_hw_state | 90682934213672960,215385455013437440,1582718613836124160,1835901918492803072,4180342879337267200,5224410778052669440,6129327221765451776,9060799253560999936 |
| PARAM_VALUE | 0 | display->dpll.mgr->get_dplls | 204657350407954432,3936139357776248832,4663370074112573440,5334416601241935872,6868165492758421504,8361789056745369600,8976139343680507904 |
| PARAM_VALUE | 0 | display->dpll.mgr->put_dplls | 1769282744316076032,3032660624085295104 |
| PARAM_VALUE | 0 | display->dpll.mgr->update_active_dpll | 0,3893979238484942848 |
| PARAM_VALUE | 0 | display->dpll.mgr->update_ref_clks | 0,3536181015747457024,6167602680813006848,6325637718150250496,6483930178044678144 |
| PARAM_VALUE | 0 | display->drm | 4096-ptr_max |
| PARAM_VALUE | 0 | display->drm->huge_mnt->mnt_sb->s_cop->inode_info_offs | 1632,1640,1720,1808,1816,2632,2640,2648,2704,2712 |
| PARAM_VALUE | 0 | display->wm.funcs->atomic_update_watermarks | 0,241866399159836672 |
| PARAM_VALUE | 0 | display->wm.funcs->compute_global_watermarks | 0,7679025112587603968 |
| PARAM_VALUE | 0 | display->wm.funcs->compute_watermarks | 0,663047380929499136,4718310602505961472,7447224825039265792,8278299763477639168 |
| PARAM_VALUE | 0 | display->wm.funcs->get_hw_state | 0,1372658440782848000,6903309568198033408,7899623770445606912,8633453788894511104 |
| PARAM_VALUE | 0 | display->wm.funcs->initial_watermarks | 0,318382624811003904,2077638626766659584,4361408001915691008 |
| PARAM_VALUE | 0 | display->wm.funcs->optimize_watermarks | 0,136016925988110336,2676780419539894272,6733336501198520320 |
| PARAM_VALUE | 0 | display->wm.funcs->sanitize | 0,3771904337417297920,8756858967241641984,9118998679592730624 |
| PARAM_VALUE | 0 | display->wm.funcs->update_wm | 0,2900677620984037376,5075417898438156288,6224038869724659712,6233422041516032000 |
| PARAM_VALUE | 0 | *display->bw.peakbw | 0-4294967295 |
| PARAM_VALUE | 0 | *display->bw.psf_bw | 0-4294967295 |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 0 | *display->power.chv_phy_assert | 0-1 |
| PARAM_VALUE | 0 | *display->wm.cur_latency | 0-u16max |
| PARAM_VALUE | 0 | *display->wm.pri_latency | 0-u16max |
| PARAM_VALUE | 0 | *display->wm.skl_latency | 0-u16max |
| PARAM_VALUE | 0 | *display->wm.spr_latency | 0-u16max |
| PARAM_VALUE | 1 | domain | 75 |
| BUF_SIZE | 0 | display | (-1),8416 |
| BUF_SIZE | 0 | display | (-1),8416 |
| DATA_SOURCE | 0 | display | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | display->cdclk.hw.cdclk | 0-16[c] |
| HOST_DATA | 0 | display->cdclk.hw.joined_mbus | 0-1 |
| HOST_DATA | 0 | display->cdclk.hw.voltage_level | 0-31[c] |
| HOST_DATA | 0 | display->cdclk.max_cdclk_freq | 1-16[c] |
| HOST_DATA | 0 | display->drm->mode_config.connector_ida.xa.xa_flags | 67108869 |
| HOST_DATA | 0 | display->drm->mode_config.object_idr.idr_rt.xa_flags | 0-u32max |
| HOST_DATA | 0 | display->drm->mode_config.tile_idr.idr_rt.xa_flags | 67108868 |
| HOST_DATA | 0 | display->drm->num_crtcs | 2[c] |
| HOST_DATA | 0 | display->fdi.pll_freq | 20000-2570000[c] |
| HOST_DATA | 0 | display->fdi.rx_config | 0,32768-98304[c] |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-1073741835 |
| HOST_DATA | 0 | display->vbt.lvds_use_ssc | 0-1 |
| NO_OVERFLOW_SIMPLE | 0 | display->drm->num_crtcs | |
| HALF_LOCKED2 | 0 | &display->drm->mode_config.connection_mutex | |
| HALF_LOCKED2 | 0 | &display->drm->mode_config.mutex |
drivers/gpu/drm/i915/display/intel_tc.c __tc_cold_block() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| DATA_SOURCE | 1 | domain | r tc_phy_cold_off_domain |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &tc->lock | ||
| TYPE_LOCK | (struct intel_tc_port)->lock |
drivers/gpu/drm/i915/display/intel_tc.c adlp_tc_phy_connect() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 0-21,76,2147483671-u32max |
| DATA_SOURCE | 1 | domain | r tc_port_power_domain |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &tc->lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_tc_port)->lock |
drivers/gpu/drm/i915/display/intel_tc.c adlp_tc_phy_disconnect() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 0-21,76,2147483671-u32max |
| DATA_SOURCE | 1 | domain | r tc_port_power_domain |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &tc->lock | ||
| TYPE_LOCK | (struct intel_tc_port)->lock |
drivers/gpu/drm/i915/display/intel_tc.c adlp_tc_phy_get_hw_state() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 0-21,76,2147483671-u32max |
| DATA_SOURCE | 1 | domain | r tc_port_power_domain |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &tc->lock | ||
| TYPE_LOCK | (struct intel_tc_port)->lock |
drivers/gpu/drm/i915/display/intel_tc.c adlp_tc_phy_hpd_live_status() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->hotplug.hpd | 4096-ptr_max |
| PARAM_VALUE | 0 | display->hotplug.pch_hpd | 4096-ptr_max |
| PARAM_VALUE | 1 | domain | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &tc->lock |
drivers/gpu/drm/i915/display/intel_tc.c get_lane_mask() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &tc->lock | ||
| TYPE_LOCK | (struct intel_tc_port)->lock |
drivers/gpu/drm/i915/display/intel_tc.c get_pin_assignment() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &tc->lock | ||
| TYPE_LOCK | (struct intel_tc_port)->lock |
drivers/gpu/drm/i915/display/intel_tc.c icl_tc_phy_hpd_live_status() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->hotplug.pch_hpd | 4096-ptr_max |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &tc->lock |
drivers/gpu/drm/i915/display/intel_tc.c tgl_tc_phy_init() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &tc->lock | ||
| TYPE_LOCK | (struct intel_tc_port)->lock |
drivers/gpu/drm/i915/display/intel_tc.c xelpdp_tc_phy_hpd_live_status() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->hotplug.hpd | 4096-ptr_max |
| PARAM_VALUE | 0 | display->hotplug.pch_hpd | 4096-ptr_max |
| PARAM_VALUE | 1 | domain | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &tc->lock |
drivers/gpu/drm/i915/display/intel_crt.c intel_crt_detect() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->drm | 0,4096-ptr_max |
| PARAM_VALUE | 0 | display->opregion | 0,4096-ptr_max |
| PARAM_VALUE | 0 | display->opregion->header->over.major | 0-255 |
| PARAM_VALUE | 0 | display->params.disable_display | 0 |
| PARAM_VALUE | 0 | display->params.load_detect_test | 1 |
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &connector->dev->mode_config.connection_mutex | ||
| HALF_LOCKED2 | &dev->mode_config.mutex | ||
| TYPE_LOCK | (struct drm_mode_config)->connection_mutex |
drivers/gpu/drm/i915/display/intel_crt.c intel_crt_detect() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->drm | 0,4096-ptr_max |
| PARAM_VALUE | 0 | display->opregion | 0,4096-ptr_max |
| PARAM_VALUE | 0 | display->opregion->header->over.major | 0-255 |
| PARAM_VALUE | 0 | display->params.disable_display | 0 |
| PARAM_VALUE | 0 | display->params.load_detect_test | 0 |
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &connector->dev->mode_config.connection_mutex | ||
| HALF_LOCKED2 | &dev->mode_config.mutex | ||
| TYPE_LOCK | (struct drm_mode_config)->connection_mutex |
drivers/gpu/drm/i915/display/intel_crt.c intel_crt_get_modes() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &client->modeset_mutex | ||
| HALF_LOCKED2 | &connector->dev->mode_config.connection_mutex | ||
| HALF_LOCKED2 | &dev->mode_config.connection_mutex | ||
| HALF_LOCKED2 | &dev->mode_config.mutex | ||
| HALF_LOCKED2 | &drm->mode_config.mutex | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | _T->lock |
drivers/gpu/drm/i915/display/intel_lt_phy.c intel_lt_phy_transaction_begin() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 73 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &display->dpll.lock |
drivers/gpu/drm/i915/display/intel_display_power.c __intel_display_power_init_hw() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->parent->rpm | 1303590034781167616 |
| PARAM_VALUE | 0 | display->parent->vlv_iosf | 0,197119610173992960 |
| PARAM_VALUE | 0 | display->power.domains.initializing | 1 |
| PARAM_VALUE | 0 | display->restore.reset_ctx.ww_ctx.ww_class->is_wait_die | 0-1 |
| PARAM_VALUE | 0 | *display->bw.peakbw | 0-4294967295 |
| PARAM_VALUE | 0 | *display->bw.psf_bw | 0-4294967295 |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 1 | domain | 75 |
| BUF_SIZE | 0 | display | (-1),8416 |
| BUF_SIZE | 0 | display | (-1),8416 |
| DATA_SOURCE | 0 | display | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | display->cdclk.hw.cdclk | 0-39168016[c] |
| HOST_DATA | 0 | display->cdclk.hw.joined_mbus | 0-1 |
| HOST_DATA | 0 | display->cdclk.hw.voltage_level | 0-31[c] |
| HOST_DATA | 0 | display->cdclk.max_cdclk_freq | 1-16[c] |
| HOST_DATA | 0 | display->cdclk.max_dotclk_freq | 0-32[c] |
| HOST_DATA | 0 | display->dmc.dmc->dc6_allowed.dc5_start | 0-4294967295 |
| HOST_DATA | 0 | display->drm->mode_config.connector_ida.xa.xa_flags | 67108869 |
| HOST_DATA | 0 | display->drm->mode_config.object_idr.idr_rt.xa_flags | 0-u32max |
| HOST_DATA | 0 | display->drm->mode_config.tile_idr.idr_rt.xa_flags | 0,67108864-u32max |
| HOST_DATA | 0 | display->drm->num_crtcs | 2[c] |
| HOST_DATA | 0 | display->hti.state | 0-u32max |
| HOST_DATA | 0 | display->power.chv_phy_control | 1-2147483649[c] |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
| NO_OVERFLOW_SIMPLE | 0 | display->drm->num_crtcs |
drivers/gpu/drm/i915/display/intel_display_power.c __intel_display_power_init_hw() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.disable_power_well | 0 |
| PARAM_VALUE | 0 | display->parent | 4096-ptr_max |
| PARAM_VALUE | 0 | display->parent->rpm | 1303590034781167616 |
| PARAM_VALUE | 0 | display->parent->vlv_iosf | 0,197119610173992960 |
| PARAM_VALUE | 0 | display->power.domains.async_put_next_delay | 0 |
| PARAM_VALUE | 0 | display->power.domains.async_put_wakeref | 0 |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | display->power.domains.init_wakeref | 4096-ptr_max,(-2) |
| PARAM_VALUE | 0 | display->power.domains.initializing | 1 |
| PARAM_VALUE | 0 | display->power.domains.lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | display->power.domains.power_wells->hw_enabled | 1 |
| PARAM_VALUE | 0 | display->restore.reset_ctx.ww_ctx.ww_class->is_wait_die | 0-1 |
| PARAM_VALUE | 0 | *display->bw.peakbw | 0-4294967295 |
| PARAM_VALUE | 0 | *display->bw.psf_bw | 0-4294967295 |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 1 | domain | 75 |
| BUF_SIZE | 0 | display | (-1),8416 |
| BUF_SIZE | 0 | display | (-1),8416 |
| DATA_SOURCE | 0 | display | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | display->cdclk.hw.cdclk | 0-39168016[c] |
| HOST_DATA | 0 | display->cdclk.hw.joined_mbus | 0-1 |
| HOST_DATA | 0 | display->cdclk.hw.voltage_level | 0-31[c] |
| HOST_DATA | 0 | display->cdclk.max_cdclk_freq | 1-16[c] |
| HOST_DATA | 0 | display->cdclk.max_dotclk_freq | 0-32[c] |
| HOST_DATA | 0 | display->dmc.dmc->dc6_allowed.dc5_start | 0-4294967295 |
| HOST_DATA | 0 | display->drm->mode_config.connector_ida.xa.xa_flags | 67108869 |
| HOST_DATA | 0 | display->drm->mode_config.object_idr.idr_rt.xa_flags | 0-u32max |
| HOST_DATA | 0 | display->drm->mode_config.tile_idr.idr_rt.xa_flags | 0,67108864-u32max |
| HOST_DATA | 0 | display->drm->num_crtcs | 2[c] |
| HOST_DATA | 0 | display->hti.state | 0-u32max |
| HOST_DATA | 0 | display->power.chv_phy_control | 1-2147483649[c] |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
| HOST_DATA | 0 | display->state.bxt_phy_grc | 0-u32max |
| NO_OVERFLOW_SIMPLE | 0 | display->drm->num_crtcs |
drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_disable() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 75 |
| DATA_SOURCE | 0 | display | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/i915/display/intel_display_power.c intel_display_power_get_in_set() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 1 | domain | 0-75 |
| DATA_SOURCE | 0 | display | $0 |
| DATA_SOURCE | 1 | domain | $2 |
| FUZZY_MAX | 1 | domain | 75 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
drivers/gpu/drm/i915/display/intel_display_power.c intel_power_domains_resume() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 1 | domain | 75 |
| DATA_SOURCE | 0 | display | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | display->cdclk.hw.cdclk | 0-16[c] |
| HOST_DATA | 0 | display->cdclk.hw.joined_mbus | 0-1 |
| HOST_DATA | 0 | display->power.chv_phy_control | 0-u32max[c] |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
| HALF_LOCKED2 | global &vgasr_mutex |
drivers/gpu/drm/i915/display/intel_dpll_mgr.c _intel_enable_shared_dpll() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->dpll.lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->dpll.lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | display->dpll.lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | display->dpll.lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | display->dpll.lock.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->dpll.lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | display->dpll.lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | display->drm | 0,4096-ptr_max |
| PARAM_VALUE | 1 | domain | 73 |
| DATA_SOURCE | 0 | display | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | 0 | &display->dpll.lock | |
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_dpll_global)->lock |
drivers/gpu/drm/i915/display/intel_dpll_mgr.c readout_dpll_hw_state() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->cdclk.table->cdclk | 0,79200,144000,151200,153600,158400,163200,172800,176000,176400,179200,180000,192000,201600,204000,211200,226800,230400,244800,249600,252000,268800,277200,285600,288000,302400,307200,312000,316800,324000,326400-4294967295 |
| PARAM_VALUE | 0 | display->cdclk.table->ratio | 0,9-10,14-41,46,50,52,54,58,60,64-65,68,92,108,116,136 |
| PARAM_VALUE | 0 | display->cdclk.table->refclk | 0,19200,24000,24400,38400 |
| PARAM_VALUE | 0 | display->cdclk.table->waveform | 0,6,34952,37448,42148,42314,43604,43690,44378,46774,56246,61166,63454,65278,65534-u16max |
| PARAM_VALUE | 0 | display->dpll.dplls | 4096-ptr_max |
| PARAM_VALUE | 0 | display->dpll.mgr->compare_hw_state | 4304445909437353984,5589390013801357312,7199724579178258432,7292826417019408384,7481167222828003328,8665324935750119424,9182544845536616448 |
| PARAM_VALUE | 0 | display->dpll.mgr->compute_dplls | 3278772287333720064,6060912680081088512,6216086186862542848,8471094383317381120,8614942105147809792,8986272695562289152,9022440569105731584 |
| PARAM_VALUE | 0 | display->dpll.mgr->dump_hw_state | 215385455013437440,1582718613836124160,1835901918492803072,4180342879337267200,5224410778052669440,6129327221765451776,9060799253560999936 |
| PARAM_VALUE | 0 | display->dpll.mgr->get_dplls | 204657350407954432,3936139357776248832,5334416601241935872,6868165492758421504,8361789056745369600,8976139343680507904 |
| PARAM_VALUE | 0 | display->dpll.mgr->put_dplls | 1769282744316076032,3032660624085295104 |
| PARAM_VALUE | 0 | display->dpll.mgr->update_active_dpll | 0,3893979238484942848 |
| PARAM_VALUE | 0 | display->dpll.mgr->update_ref_clks | 0,3536181015747457024,6167602680813006848,6325637718150250496,6483930178044678144 |
| PARAM_VALUE | 0 | display->dpll.num_dpll | 1-s32max |
| PARAM_VALUE | 0 | display->drm | 4096-ptr_max |
| PARAM_VALUE | 0 | display->hotplug.poll_enabled | 0 |
| PARAM_VALUE | 0 | display->irq.vlv_display_irqs_enabled | 1 |
| PARAM_VALUE | 0 | display->opregion->vbt | 0-s64max |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->parent | 4096-ptr_max |
| PARAM_VALUE | 0 | display->parent->irq | 5062596649199198208 |
| PARAM_VALUE | 0 | display->parent->vlv_iosf | 197119610173992960 |
| PARAM_VALUE | 0 | display->power.domains.async_put_next_delay | 0 |
| PARAM_VALUE | 0 | display->power.domains.async_put_wakeref | 0 |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.next | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.next->next | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.prev | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.prev->next | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.async_put_work.work.entry.prev->prev | 1-u64max |
| PARAM_VALUE | 0 | display->power.domains.initializing | 1 |
| PARAM_VALUE | 0 | display->power.domains.lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.lock.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.power_wells->count | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.power_wells->desc->irq_pipe_mask | 0-2,4,6,8 |
| PARAM_VALUE | 0 | display->power.domains.power_wells->hw_enabled | 0-1 |
| PARAM_VALUE | 0 | display->wl.enabled | 0 |
| PARAM_VALUE | 0 | display->wm.funcs->atomic_update_watermarks | 0,241866399159836672 |
| PARAM_VALUE | 0 | display->wm.funcs->compute_global_watermarks | 0,7679025112587603968 |
| PARAM_VALUE | 0 | display->wm.funcs->compute_watermarks | 0,663047380929499136,4718310602505961472,7447224825039265792,8278299763477639168 |
| PARAM_VALUE | 0 | display->wm.funcs->get_hw_state | 0,1372658440782848000,6903309568198033408,7899623770445606912,8633453788894511104 |
| PARAM_VALUE | 0 | display->wm.funcs->initial_watermarks | 0,318382624811003904,2077638626766659584,4361408001915691008 |
| PARAM_VALUE | 0 | display->wm.funcs->optimize_watermarks | 0,136016925988110336,2676780419539894272,6733336501198520320 |
| PARAM_VALUE | 0 | display->wm.funcs->sanitize | 0,3771904337417297920,8756858967241641984,9118998679592730624 |
| PARAM_VALUE | 0 | display->wm.funcs->update_wm | 0,2900677620984037376,5075417898438156288,6224038869724659712,6233422041516032000 |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 0 | *display->power.chv_phy_assert | 0-1 |
| PARAM_VALUE | 0 | *display->wm.cur_latency | 0-u16max |
| PARAM_VALUE | 0 | *display->wm.pri_latency | 0-u16max |
| PARAM_VALUE | 0 | *display->wm.skl_latency | 0-u16max |
| PARAM_VALUE | 0 | *display->wm.spr_latency | 0-u16max |
| PARAM_VALUE | 1 | domain | 73 |
| DATA_SOURCE | 0 | display | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | display->cdclk.hw.cdclk | 0-16[c] |
| HOST_DATA | 0 | display->cdclk.hw.joined_mbus | 0-1 |
| HOST_DATA | 0 | display->cdclk.hw.voltage_level | 0-31[c] |
| HOST_DATA | 0 | display->cdclk.max_cdclk_freq | 1-39168016[c] |
| HOST_DATA | 0 | display->drm->mode_config.connector_ida.xa.xa_flags | 67108869 |
| HOST_DATA | 0 | display->drm->mode_config.object_idr.idr_rt.xa_flags | 0-u32max |
| HOST_DATA | 0 | display->drm->mode_config.tile_idr.idr_rt.xa_flags | 67108868 |
| HOST_DATA | 0 | display->drm->num_crtcs | 2[c] |
| HOST_DATA | 0 | display->fdi.pll_freq | 20000-2570000[c] |
| HOST_DATA | 0 | display->fdi.rx_config | 0,32768-98304[c] |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
| NO_OVERFLOW_SIMPLE | 0 | display->drm->num_crtcs | |
| HALF_LOCKED2 | 0 | &display->drm->mode_config.connection_mutex | |
| HALF_LOCKED2 | 0 | &display->drm->mode_config.mutex |
drivers/gpu/drm/i915/display/intel_dmc.c intel_dmc_runtime_pm_get() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->parent->vlv_iosf | 0,197119610173992960 |
| PARAM_VALUE | 0 | display->power.domains.power_wells->desc->enable_timeout | 0,500 |
| PARAM_VALUE | 0 | display->power.domains.power_wells->desc->irq_pipe_mask | 0-2,4,6,8 |
| PARAM_VALUE | 0 | display->restore.reset_ctx.ww_ctx.ww_class->is_wait_die | 0-1 |
| PARAM_VALUE | 0 | *display->bw.peakbw | 0-4294967295 |
| PARAM_VALUE | 0 | *display->bw.psf_bw | 0-4294967295 |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 0 | *display->power.chv_phy_assert | 0-1 |
| PARAM_VALUE | 1 | domain | 75 |
| BUF_SIZE | 0 | display | (-1),8416 |
| BUF_SIZE | 0 | display | (-1),8416 |
| BUF_SIZE | 0 | display->hotplug.dp_wq | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.cleanup | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.flip | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.modeset | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.unordered | (-1),512,528-8720 |
| DATA_SOURCE | 0 | display | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | display->cdclk.hw.joined_mbus | 0-1 |
| HOST_DATA | 0 | display->dmc.dmc->dc6_allowed.dc5_start | 0-u32max |
| NO_OVERFLOW_SIMPLE | 0 | display->drm->num_crtcs |
drivers/gpu/drm/i915/display/intel_dp.c intel_digital_port_connected_locked() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_cx0_phy_transaction_begin() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 73 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/i915/display/intel_ddi.c hsw_ddi_pre_enable_dp() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/i915/display/intel_ddi.c intel_ddi_get_power_domains() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &display->drm->mode_config.connection_mutex | ||
| HALF_LOCKED2 | &display->drm->mode_config.mutex |
drivers/gpu/drm/i915/display/intel_ddi.c intel_ddi_pre_enable_hdmi() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/i915/display/intel_ddi.c main_link_aux_power_domain_get() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 0-75,77-u32max |
| DATA_SOURCE | 1 | domain | r intel_ddi_main_link_aux_domain |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/i915/display/intel_ddi.c tgl_ddi_pre_enable_dp() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/i915/display/intel_hotplug.c i915_hpd_poll_init_work() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->drm->mode_config.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->drm->mode_config.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | display->drm->mode_config.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | display->drm->mode_config.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | display->drm->mode_config.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | display->drm->mode_config.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | display->hotplug.poll_enabled | 0 |
| PARAM_VALUE | 1 | domain | 0 |
| CAPPED_DATA | 0 | &display->drm->mode_config.mutex | 1 |
| LOCK2 | 0 | &display->drm->mode_config.mutex | |
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct drm_mode_config)->mutex |
drivers/gpu/drm/i915/display/intel_gmbus.c gmbus_xfer() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 71 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/i915/display/intel_gmbus.c intel_gmbus_output_aksv() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 71 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &dig_port->hdcp.mutex | ||
| LOCK2 | &hdcp->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_digital_port)->hdcp.mutex | ||
| TYPE_LOCK | (struct intel_hdcp)->mutex |
drivers/gpu/drm/i915/display/intel_display_debugfs.c i915_sr_status() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 75 |
| DATA_SOURCE | 0 | display | r node_to_intel_display |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &m->lock | ||
| TYPE_LOCK | (struct seq_file)->lock |
drivers/gpu/drm/i915/display/intel_pps.c intel_pps_lock() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &display->drm->mode_config.connection_mutex.mutex |
drivers/gpu/drm/i915/display/intel_pps.c intel_pps_vdd_on_unlocked() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &display->pps.mutex |
drivers/gpu/drm/i915/display/intel_pps.c pps_vdd_init() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->drm | 0,4096-ptr_max |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &display->pps.mutex |
drivers/gpu/drm/i915/display/intel_psr.c intel_psr_notify_vblank_enable_disable() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 1 | domain | 73 |
| DATA_SOURCE | 0 | display | $0 |
| HOST_DATA | 0 | display->dmc.dmc->dc6_allowed.dc5_start | 0-4294967295 |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
| LOCK2 | &intel_dp->psr.lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_psr)->lock |
drivers/gpu/drm/i915/gt/intel_gt_pm.c __gt_unpark() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | domain | 72 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | &wf->mutex | ||
| HALF_LOCKED2 | &ce->pin_mutex | ||
| HALF_LOCKED2 | &ref->mutex | ||
| HALF_LOCKED2 | obj->base.resv | ||
| TYPE_LOCK | (struct intel_wakeref)->mutex |
drivers/gpu/drm/i915/display/intel_display.c intel_atomic_commit_tail() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->parent | 4096-ptr_max |
| PARAM_VALUE | 0 | display->parent->transient_data_flush | 0 |
| PARAM_VALUE | 1 | domain | 73 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_dp_aux.c intel_dp_aux_xfer() -> intel_display_power_get()
| Type | Parameter | Key | Value |
|---|---|---|---|
| DATA_SOURCE | 1 | domain | r intel_aux_power_domain |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &aux->hw_mutex |