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Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 2 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_lt_phy.c intel_lt_phy_write() -> intel_cx0_write()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1,3
PARAM_VALUE 2 addr 3074-3153,3267-3268
PARAM_VALUE 4 committed 1
DATA_SOURCE 0 encoder $0
DATA_SOURCE 1 lane_mask $1
DATA_SOURCE 2 addr $2
DATA_SOURCE 3 data $3
DATA_SOURCE 4 committed $4
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &display->dpll.lock
TYPE_LOCK (struct intel_dpll_global)->lock

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c10_pll_program() -> intel_cx0_write()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3072-3091
DATA_SOURCE 0 encoder $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 addr unit_byte
HALF_LOCKED2 &display->dpll.lock

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c10_pll_program() -> intel_cx0_write()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3104
PARAM_VALUE 4 committed 1
DATA_SOURCE 0 encoder $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &display->dpll.lock

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c10_pll_program() -> intel_cx0_write()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3120
PARAM_VALUE 4 committed 1
DATA_SOURCE 0 encoder $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &display->dpll.lock

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c20_sram_read() -> intel_cx0_write()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3079
PARAM_VALUE 3 data 203-207
PARAM_VALUE 4 committed 0
DATA_SOURCE 0 encoder $0
DATA_SOURCE 1 lane_mask $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &display->dpll.lock
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c20_sram_read() -> intel_cx0_write()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3078
PARAM_VALUE 3 data 0,68-94
PARAM_VALUE 4 committed 1
DATA_SOURCE 0 encoder $0
DATA_SOURCE 1 lane_mask $1
BIT_INFO 3 data 0x0,0xff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &display->dpll.lock
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c20_sram_write() -> intel_cx0_write()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3075
PARAM_VALUE 3 data 48-207
PARAM_VALUE 4 committed 0
DATA_SOURCE 0 encoder $0
DATA_SOURCE 1 lane_mask $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &display->dpll.lock

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c20_sram_write() -> intel_cx0_write()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3074
PARAM_VALUE 3 data 0,61-94
PARAM_VALUE 4 committed 0
DATA_SOURCE 0 encoder $0
DATA_SOURCE 1 lane_mask $1
BIT_INFO 3 data 0x0,0xff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &display->dpll.lock

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c20_sram_write() -> intel_cx0_write()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3077
PARAM_VALUE 4 committed 0
DATA_SOURCE 0 encoder $0
DATA_SOURCE 1 lane_mask $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &display->dpll.lock

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c20_sram_write() -> intel_cx0_write()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3076
PARAM_VALUE 4 committed 1
DATA_SOURCE 0 encoder $0
DATA_SOURCE 1 lane_mask $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &display->dpll.lock