Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 2 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_lt_phy.c intel_lt_phy_read() -> intel_cx0_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3074-3075,3078-3153,3267-3268
DATA_SOURCE 0 encoder $0
DATA_SOURCE 1 lane_mask $1
DATA_SOURCE 2 addr $2
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &display->dpll.lock

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c10pll_readout_hw_state() -> intel_cx0_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3072-3091
DATA_SOURCE 0 encoder $0
RX_PATH
TASK_NOT_RUNNING
UNITS 2 addr unit_byte
HALF_LOCKED2 &display->dpll.lock
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c10pll_readout_hw_state() -> intel_cx0_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3104
DATA_SOURCE 0 encoder $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &display->dpll.lock
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c10pll_readout_hw_state() -> intel_cx0_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3120
DATA_SOURCE 0 encoder $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &display->dpll.lock
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c20_pll_program() -> intel_cx0_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3328
DATA_SOURCE 0 encoder $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &display->dpll.lock

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c20_readout_vdr_params() -> intel_cx0_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3328
DATA_SOURCE 0 encoder $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &display->dpll.lock
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c20_readout_vdr_params() -> intel_cx0_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3330
DATA_SOURCE 0 encoder $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &display->dpll.lock
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c20_readout_vdr_params() -> intel_cx0_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3329
DATA_SOURCE 0 encoder $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &display->dpll.lock
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c20_sram_read() -> intel_cx0_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3081
DATA_SOURCE 0 encoder $0
DATA_SOURCE 1 lane_mask $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &display->dpll.lock
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_c20_sram_read() -> intel_cx0_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1
PARAM_VALUE 2 addr 3080
DATA_SOURCE 0 encoder $0
DATA_SOURCE 1 lane_mask $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &display->dpll.lock
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_cx0_phy.c intel_readout_lane_count() -> intel_cx0_read()

Type Parameter Key Value
PARAM_VALUE 0 encoder 4096-ptr_max
PARAM_VALUE 1 lane_mask 1-2
PARAM_VALUE 2 addr 1026-1538
CAPPED_DATA 2 addr 1
DATA_SOURCE 0 encoder $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &display->dpll.lock
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 &display->drm->mode_config.mutex