intel_cdclk_dump_config identifier - Linux source code next-20260811

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linux

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FIXME
- FIXME
  - next-20260811

Defined in 1 files as a prototype:

drivers/gpu/drm/i915/display/intel_cdclk.h, line 39 (as a prototype)

Defined in 1 files as a function:

drivers/gpu/drm/i915/display/intel_cdclk.c, line 2614 (as a function)

Referenced in 2 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_cdclk.c bxt_sanitize_cdclk() -> intel_cdclk_dump_config()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs->get_cdclk	4096-ptr_max
PARAM_VALUE	0	display->cdclk.hw.bypass	9600,12000,19200,24000,38400,50000
PARAM_VALUE	0	display->cdclk.hw.ref	19200,24000,38400
PARAM_VALUE	0	display->cdclk.hw.voltage_level	0-31
PARAM_VALUE	0	display->drm	0,4096-ptr_max
PARAM_VALUE	0	display->hotplug.poll_init_work.entry.next	4096-ptr_max
PARAM_VALUE	0	display->irq.vlv_display_irqs_enabled	1
PARAM_VALUE	0	display->opregion->vbt	0-s64max
PARAM_VALUE	0	display->parent->vlv_iosf	0,197119610173992960
PARAM_VALUE	0	display->power.domains.async_put_work.wq->dfl_pwq	0-s64max
PARAM_VALUE	0	display->power.domains.async_put_work.wq->saved_max_active	s32min-s32max
PARAM_VALUE	0	display->power.domains.async_put_work.wq->saved_min_active	s32min-s32max
PARAM_VALUE	0	display->power.domains.lock.dep_map->name	0-255
PARAM_VALUE	0	display->power.domains.lock.first_waiter->list.prev->next	5159360019465732096
PARAM_VALUE	0	display->power.domains.lock.first_waiter->list.prev->prev	5159360019465732096
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name	0-255
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.owner	(-1)
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu	4294967295
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter	0-s32max
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->usage.refs.counter	s32min-s32max
PARAM_VALUE	0	display->power.domains.lock.osq.tail.counter	0-s32max
PARAM_VALUE	0	display->power.domains.lock.wait_lock.dep_map->name	0-255
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	0	*display->irq.pipestat_irq_mask	0-4294967295
PARAM_VALUE	1	cdclk_config	4096-ptr_max
PARAM_VALUE	1	cdclk_config->bypass	9600,12000,19200,24000,38400,50000
PARAM_VALUE	1	cdclk_config->ref	19200,24000,38400
PARAM_VALUE	1	cdclk_config->voltage_level	0-31
PARAM_VALUE	2	context	5936806671284781056
BUF_SIZE	0	display	(-1),8128
BUF_SIZE	0	display	(-1),8128
BUF_SIZE	2	context	14
DATA_SOURCE	0	display	$0
STR_LEN	0	display	13
TERMINATED	2	context	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	display->cdclk.hw.cdclk	0-39168016[c]
HOST_DATA	0	display->cdclk.hw.joined_mbus	0-1
HOST_DATA	0	display->cdclk.hw.voltage_level	0-31[c]
HOST_DATA	0	display->drm->mode_config.object_idr.idr_rt.xa_flags	0,4-u32max
HOST_DATA	0	display->power.domains.dc_state	0-u32max
HOST_DATA	0	display->state.bxt_phy_grc	0-u32max
HOST_DATA	1	cdclk_config->cdclk	0-39168016[c]
HOST_DATA	1	cdclk_config->joined_mbus	0-1
HOST_DATA	1	cdclk_config->voltage_level	0-31[c]
NO_OVERFLOW_SIMPLE	0	display->drm->num_crtcs

drivers/gpu/drm/i915/display/intel_cdclk.c intel_cdclk_read_hw() -> intel_cdclk_dump_config()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs->get_cdclk	4096-ptr_max
PARAM_VALUE	0	display->cdclk.hw.bypass	9600,12000,19200,24000,38400,50000
PARAM_VALUE	0	display->cdclk.hw.ref	19200,24000,38400
PARAM_VALUE	0	display->cdclk.hw.voltage_level	0-31
PARAM_VALUE	0	display->dpll.mgr->compare_hw_state	1988828769907408896,4304445909437353984,5589390013801357312,7199724579178258432,7292826417019408384,7481167222828003328,8665324935750119424,9182544845536616448
PARAM_VALUE	0	display->dpll.mgr->compute_dplls	3278772287333720064,5266472627050582016,6060912680081088512,6216086186862542848,8471094383317381120,8614942105147809792,8986272695562289152,9022440569105731584
PARAM_VALUE	0	display->dpll.mgr->dump_hw_state	90682934213672960,215385455013437440,1582718613836124160,1835901918492803072,4180342879337267200,5224410778052669440,6129327221765451776,9060799253560999936
PARAM_VALUE	0	display->dpll.mgr->get_dplls	204657350407954432,3936139357776248832,4663370074112573440,5334416601241935872,6868165492758421504,8361789056745369600,8976139343680507904
PARAM_VALUE	0	display->dpll.mgr->put_dplls	1769282744316076032,3032660624085295104
PARAM_VALUE	0	display->dpll.mgr->update_active_dpll	0,3893979238484942848
PARAM_VALUE	0	display->dpll.mgr->update_ref_clks	0,3536181015747457024,6167602680813006848,6325637718150250496,6483930178044678144
PARAM_VALUE	0	display->drm	4096-ptr_max
PARAM_VALUE	0	display->parent->irq	5062596649199198208
PARAM_VALUE	0	display->parent->pcode	600309631264055296
PARAM_VALUE	0	display->wl.taken	1
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	display->wm.funcs->atomic_update_watermarks	0,241866399159836672
PARAM_VALUE	0	display->wm.funcs->compute_global_watermarks	0,7679025112587603968
PARAM_VALUE	0	display->wm.funcs->compute_watermarks	0,663047380929499136,4718310602505961472,7447224825039265792,8278299763477639168
PARAM_VALUE	0	display->wm.funcs->get_hw_state	0,1372658440782848000,6903309568198033408,7899623770445606912,8633453788894511104
PARAM_VALUE	0	display->wm.funcs->initial_watermarks	0,318382624811003904,2077638626766659584,4361408001915691008
PARAM_VALUE	0	display->wm.funcs->optimize_watermarks	0,136016925988110336,2676780419539894272,6733336501198520320
PARAM_VALUE	0	display->wm.funcs->sanitize	0,3771904337417297920,8756858967241641984,9118998679592730624
PARAM_VALUE	0	display->wm.funcs->update_wm	0,2900677620984037376,5075417898438156288,6224038869724659712,6233422041516032000
PARAM_VALUE	0	*display->bw.peakbw	0-4294967295
PARAM_VALUE	0	*display->bw.psf_bw	0-4294967295
PARAM_VALUE	0	*display->irq.pipestat_irq_mask	0-4294967295
PARAM_VALUE	1	cdclk_config	4096-ptr_max
PARAM_VALUE	1	cdclk_config->bypass	9600,12000,19200,24000,38400,50000
PARAM_VALUE	1	cdclk_config->ref	19200,24000,38400
PARAM_VALUE	1	cdclk_config->voltage_level	0-31
PARAM_VALUE	2	context	5936806671284781056
BUF_SIZE	0	display	(-1),8416
BUF_SIZE	0	display	(-1),8416
BUF_SIZE	2	context	14
DATA_SOURCE	0	display	$0
STR_LEN	0	display	13
TERMINATED	2	context	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	display->cdclk.hw.cdclk	0-16[c]
HOST_DATA	0	display->cdclk.hw.joined_mbus	0-1
HOST_DATA	0	display->fdi.pll_freq	20000-2570000[c]
HOST_DATA	0	display->power.domains.dc_state	0-1073741835
HOST_DATA	0	display->vbt.lvds_use_ssc	0-1
HOST_DATA	1	cdclk_config->cdclk	0-16[c]
HOST_DATA	1	cdclk_config->joined_mbus	0-1
NO_OVERFLOW_SIMPLE	0	display->drm->num_crtcs
HALF_LOCKED2	0	&display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_cdclk.c intel_set_cdclk() -> intel_cdclk_dump_config()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs->set_cdclk	981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE	1	cdclk_config	4096-ptr_max
PARAM_VALUE	2	context	6297678338422525952,6870405121738764288
BUF_SIZE	2	context	22-23
BUF_SIZE	2	context	22-23
DATA_SOURCE	0	display	$0
DATA_SOURCE	1	cdclk_config	$1
DATA_SOURCE	2	context	$3
STR_LEN	0	display	21-22
STR_LEN	0	display	21-22
TERMINATED	2	context	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2		&pool->lock

drivers/gpu/drm/i915/display/intel_cdclk.c intel_set_cdclk() -> intel_cdclk_dump_config()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs->set_cdclk	981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE	0	display->cdclk.hw.bypass	9600,12000,19200,24000,38400,50000
PARAM_VALUE	0	display->cdclk.hw.ref	19200,24000,38400
PARAM_VALUE	0	display->cdclk.hw.voltage_level	0-31
PARAM_VALUE	0	display->dkl.phy_lock.rlock.dep_map->name	0-255
PARAM_VALUE	0	display->drm	0,4096-ptr_max
PARAM_VALUE	0	display->gmbus.mutex.dep_map->name	0-255
PARAM_VALUE	0	display->gmbus.mutex.first_waiter	0,4096-ptr_max
PARAM_VALUE	0	display->gmbus.mutex.first_waiter->list.prev->next	5159360019465732096
PARAM_VALUE	0	display->gmbus.mutex.first_waiter->task->blocked_lock.dep_map->name	0-255
PARAM_VALUE	0	display->gmbus.mutex.first_waiter->task->blocked_lock.owner	(-1)
PARAM_VALUE	0	display->gmbus.mutex.first_waiter->task->blocked_lock.owner_cpu	4294967295
PARAM_VALUE	0	display->gmbus.mutex.first_waiter->task->blocked_lock.raw_lock.val.counter	s32min-s32max
PARAM_VALUE	0	display->gmbus.mutex.first_waiter->task->usage.refs.counter	s32min-s32max
PARAM_VALUE	0	display->gmbus.mutex.osq.tail.counter	0-s32max
PARAM_VALUE	0	display->gmbus.mutex.wait_lock.dep_map->name	0-255
PARAM_VALUE	0	display->hotplug.poll_init_work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.prev	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	display->power.domains.lock.dep_map->name	0-255
PARAM_VALUE	0	display->power.domains.lock.first_waiter->list.prev->next	5159360019465732096
PARAM_VALUE	0	display->power.domains.lock.first_waiter->list.prev->prev	5159360019465732096
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name	0-255
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.owner	(-1)
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu	4294967295
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter	s32min-s32max
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->usage.refs.counter	s32min-s32max
PARAM_VALUE	0	display->power.domains.lock.osq.tail.counter	0-s32max
PARAM_VALUE	0	display->power.domains.power_wells->count	s32min-s32max
PARAM_VALUE	0	display->power.domains.power_wells->hw_enabled	1
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	*display->irq.pipestat_irq_mask	0-4294967295
PARAM_VALUE	0	*display->power.chv_phy_assert	0-1
PARAM_VALUE	1	cdclk_config	4096-ptr_max
PARAM_VALUE	1	cdclk_config->bypass	9600,12000,19200,24000,38400,50000
PARAM_VALUE	1	cdclk_config->ref	19200,24000,38400
PARAM_VALUE	1	cdclk_config->voltage_level	0-31
PARAM_VALUE	2	context	6956406474233749504
BUF_SIZE	2	context	11
CAPPED_DATA	0	display->cdclk.hw.ref	1
CAPPED_DATA	0	display->cdclk.hw.voltage_level	1
CAPPED_DATA	0	&display->gmbus.mutex	1
DATA_SOURCE	0	display	$0
STR_LEN	0	display	21-22
STR_LEN	0	display	21-22
STR_LEN	1	cdclk_config	10
TERMINATED	2	context	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	display->cdclk.hw.joined_mbus	0-1
HOST_DATA	0	display->dmc.dmc->dc6_allowed.dc5_start	0-4294967295
HOST_DATA	0	display->power.domains.dc_state	0-u32max
HOST_DATA	1	cdclk_config->joined_mbus	0-1
HALF_LOCKED2		&pool->lock

drivers/gpu/drm/i915/display/intel_cdclk.c intel_set_cdclk() -> intel_cdclk_dump_config()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs->set_cdclk	981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE	0	display->cdclk.hw.bypass	9600,12000,19200,24000,38400,50000
PARAM_VALUE	0	display->cdclk.hw.ref	19200,24000,38400
PARAM_VALUE	0	display->cdclk.hw.voltage_level	0-31
PARAM_VALUE	0	display->dkl.phy_lock.rlock.dep_map->name	0-255
PARAM_VALUE	0	display->drm	0,4096-ptr_max
PARAM_VALUE	0	display->gmbus.mutex.dep_map->name	0-255
PARAM_VALUE	0	display->gmbus.mutex.first_waiter	0,4096-ptr_max
PARAM_VALUE	0	display->gmbus.mutex.first_waiter->list.prev->next	5159360019465732096
PARAM_VALUE	0	display->gmbus.mutex.first_waiter->task->blocked_lock.dep_map->name	0-255
PARAM_VALUE	0	display->gmbus.mutex.first_waiter->task->blocked_lock.owner	(-1)
PARAM_VALUE	0	display->gmbus.mutex.first_waiter->task->blocked_lock.owner_cpu	4294967295
PARAM_VALUE	0	display->gmbus.mutex.first_waiter->task->blocked_lock.raw_lock.val.counter	s32min-s32max
PARAM_VALUE	0	display->gmbus.mutex.first_waiter->task->usage.refs.counter	s32min-s32max
PARAM_VALUE	0	display->gmbus.mutex.osq.tail.counter	0-s32max
PARAM_VALUE	0	display->gmbus.mutex.wait_lock.dep_map->name	0-255
PARAM_VALUE	0	display->hotplug.poll_init_work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.prev	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	display->power.domains.lock.dep_map->name	0-255
PARAM_VALUE	0	display->power.domains.lock.first_waiter->list.prev->next	5159360019465732096
PARAM_VALUE	0	display->power.domains.lock.first_waiter->list.prev->prev	5159360019465732096
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name	0-255
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.owner	(-1)
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu	4294967295
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter	s32min-s32max
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->usage.refs.counter	s32min-s32max
PARAM_VALUE	0	display->power.domains.lock.osq.tail.counter	0-s32max
PARAM_VALUE	0	display->power.domains.power_wells->count	s32min-s32max
PARAM_VALUE	0	display->power.domains.power_wells->hw_enabled	1
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	*display->irq.pipestat_irq_mask	0-4294967295
PARAM_VALUE	0	*display->power.chv_phy_assert	0-1
PARAM_VALUE	1	cdclk_config	4096-ptr_max
PARAM_VALUE	2	context	618264395783544832
BUF_SIZE	2	context	11
CAPPED_DATA	0	display->cdclk.hw.ref	1
CAPPED_DATA	0	display->cdclk.hw.voltage_level	1
CAPPED_DATA	0	&display->gmbus.mutex	1
DATA_SOURCE	0	display	$0
DATA_SOURCE	1	cdclk_config	$1
STR_LEN	0	display	21-22
STR_LEN	0	display	21-22
STR_LEN	1	cdclk_config	10
TERMINATED	2	context	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	display->cdclk.hw.joined_mbus	0-1
HOST_DATA	0	display->dmc.dmc->dc6_allowed.dc5_start	0-4294967295
HOST_DATA	0	display->power.domains.dc_state	0-u32max
HALF_LOCKED2		&pool->lock

drivers/gpu/drm/i915/display/intel_cdclk.c skl_sanitize_cdclk() -> intel_cdclk_dump_config()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs->get_cdclk	4096-ptr_max
PARAM_VALUE	0	display->cdclk.hw.bypass	9600,12000,19200,24000,38400,50000
PARAM_VALUE	0	display->cdclk.hw.ref	19200,24000,38400
PARAM_VALUE	0	display->cdclk.hw.voltage_level	0-31
PARAM_VALUE	0	display->drm	0,4096-ptr_max
PARAM_VALUE	0	display->hotplug.poll_init_work.entry.next	4096-ptr_max
PARAM_VALUE	0	display->irq.vlv_display_irqs_enabled	1
PARAM_VALUE	0	display->opregion->vbt	0-s64max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->parent->vlv_iosf	0,197119610173992960
PARAM_VALUE	0	display->platform.broxton	0
PARAM_VALUE	0	display->power.domains.async_put_work.wq->dfl_pwq	0-s64max
PARAM_VALUE	0	display->power.domains.async_put_work.wq->saved_max_active	s32min-s32max
PARAM_VALUE	0	display->power.domains.async_put_work.wq->saved_min_active	s32min-s32max
PARAM_VALUE	0	display->power.domains.lock.dep_map->name	0-255
PARAM_VALUE	0	display->power.domains.lock.first_waiter->list.prev->next	5159360019465732096
PARAM_VALUE	0	display->power.domains.lock.first_waiter->list.prev->prev	5159360019465732096
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name	0-255
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.owner	(-1)
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu	4294967295
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter	0-s32max
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->usage.refs.counter	s32min-s32max
PARAM_VALUE	0	display->power.domains.lock.osq.tail.counter	0-s32max
PARAM_VALUE	0	display->power.domains.lock.wait_lock.dep_map->name	0-255
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	0	*display->irq.pipestat_irq_mask	0-4294967295
PARAM_VALUE	1	cdclk_config	4096-ptr_max
PARAM_VALUE	1	cdclk_config->bypass	9600,12000,19200,24000,38400,50000
PARAM_VALUE	1	cdclk_config->ref	19200,24000,38400
PARAM_VALUE	1	cdclk_config->voltage_level	0-31
PARAM_VALUE	2	context	5936806671284781056
BUF_SIZE	0	display	(-1),8128
BUF_SIZE	0	display	(-1),8128
BUF_SIZE	2	context	14
DATA_SOURCE	0	display	$0
STR_LEN	0	display	13
TERMINATED	2	context	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	display->cdclk.hw.cdclk	0-39168016[c]
HOST_DATA	0	display->cdclk.hw.joined_mbus	0-1
HOST_DATA	0	display->cdclk.hw.voltage_level	0-31[c]
HOST_DATA	0	display->drm->mode_config.object_idr.idr_rt.xa_flags	0,4-u32max
HOST_DATA	0	display->power.domains.dc_state	0-u32max
HOST_DATA	0	display->state.bxt_phy_grc	0-u32max
HOST_DATA	1	cdclk_config->cdclk	0-39168016[c]
HOST_DATA	1	cdclk_config->joined_mbus	0-1
HOST_DATA	1	cdclk_config->voltage_level	0-31[c]
NO_OVERFLOW_SIMPLE	0	display->drm->num_crtcs

drivers/gpu/drm/i915/display/intel_display_power.c hsw_restore_lcpll() -> intel_cdclk_dump_config()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs	4096-ptr_max
PARAM_VALUE	0	display->cdclk.funcs->get_cdclk	4096-ptr_max
PARAM_VALUE	0	display->cdclk.hw.bypass	9600,12000,19200,24000,38400,50000
PARAM_VALUE	0	display->cdclk.hw.ref	19200,24000,38400
PARAM_VALUE	0	display->cdclk.hw.voltage_level	0-31
PARAM_VALUE	0	display->drm	0,4096-ptr_max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->parent	4096-ptr_max
PARAM_VALUE	0	display->platform.broxton	0
PARAM_VALUE	0	display->platform.geminilake	0
PARAM_VALUE	0	display->wl.work.timer.entry->pprev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	*display->irq.pipestat_irq_mask	0-4294967295
PARAM_VALUE	1	cdclk_config	4096-ptr_max
PARAM_VALUE	1	cdclk_config->bypass	9600,12000,19200,24000,38400,50000
PARAM_VALUE	1	cdclk_config->ref	19200,24000,38400
PARAM_VALUE	1	cdclk_config->voltage_level	0-31
PARAM_VALUE	2	context	5936806671284781056
BUF_SIZE	2	context	14
DATA_SOURCE	0	display	$0
STR_LEN	0	display	13
TERMINATED	2	context	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	display->cdclk.hw.cdclk	0-39168016[c]
HOST_DATA	0	display->cdclk.hw.joined_mbus	0-1
HOST_DATA	0	display->cdclk.hw.voltage_level	0-31[c]
HOST_DATA	0	display->power.domains.dc_state	0-1073741835
HOST_DATA	1	cdclk_config->cdclk	0-39168016[c]
HOST_DATA	1	cdclk_config->joined_mbus	0-1
HOST_DATA	1	cdclk_config->voltage_level	0-31[c]