Defined in 5 files as a function:
- drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c, line 2392 (as a function)
- drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c, line 1656 (as a function)
- drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c, line 1325 (as a function)
- drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c, line 1076 (as a function)
- drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c, line 1021 (as a function)
Referenced in 5 files:
- drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c, line 2613
- drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c, line 2608
- drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c, line 1595
- drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c, line 1501
- drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c, line 1433
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn30/dcn30_resource.c dcn30_resource_construct() -> init_soc_bounding_box()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dc | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dcn_arch | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_ram | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.bt2020 | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.gamma2_2 | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.hlg | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.pq | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.srgb | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_for_yuv | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.gamma_corr | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.hw_3d_lut | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.icsc | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.input_lut_shared | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ocsc | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_ram | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.bt2020 | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.hlg | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.pq | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.srgb | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.post_csc | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.upsp_pre_scaler | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.gamut_remap | 1 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.num_3dluts | 3 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ocsc | 1 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_ram | 1 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.bt2020 | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.hlg | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.pq | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.srgb | 0 |
| PARAM_VALUE | 0 | dc->caps.cursor_cache_size | 524288 |
| PARAM_VALUE | 0 | dc->caps.dmcub_support | 1 |
| PARAM_VALUE | 0 | dc->caps.dmdata_alloc_size | 2048 |
| PARAM_VALUE | 0 | dc->caps.dp_hdmi21_pcon_support | 1 |
| PARAM_VALUE | 0 | dc->caps.extended_aux_timeout_support | 1 |
| PARAM_VALUE | 0 | dc->caps.force_dp_tps4_for_cp2520 | 1 |
| PARAM_VALUE | 0 | dc->caps.hdmi_hpo | 1 |
| PARAM_VALUE | 0 | dc->caps.i2c_speed_in_khz | 100 |
| PARAM_VALUE | 0 | dc->caps.i2c_speed_in_khz_hdcp | 100 |
| PARAM_VALUE | 0 | dc->caps.mall_size_per_mem_channel | 8 |
| PARAM_VALUE | 0 | dc->caps.max_cursor_size | 256 |
| PARAM_VALUE | 0 | dc->caps.max_downscale_ratio | 600 |
| PARAM_VALUE | 0 | dc->caps.max_slave_planes | 2 |
| PARAM_VALUE | 0 | dc->caps.max_slave_rgb_planes | 2 |
| PARAM_VALUE | 0 | dc->caps.max_slave_yuv_planes | 2 |
| PARAM_VALUE | 0 | dc->caps.max_v_total | s16max |
| PARAM_VALUE | 0 | dc->caps.min_horizontal_blanking_period | 80 |
| PARAM_VALUE | 0 | dc->caps.post_blend_color_processing | 1 |
| PARAM_VALUE | 0 | dc->caps.vtotal_limited_by_fp2 | 1 |
| PARAM_VALUE | 0 | dc->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->cgs_device | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->mes.saved_flags | 0-4294967295 |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | dc->ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.AverageDCCCompressionRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.AverageReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.BPP | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.BandwidthAvailableForImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.CriticalPoint | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.CursorBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.CursorChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DCFCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DCFCLKDeepSleep | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DETBufferSizeInTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLKRampingMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLKWithRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLKWithoutRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLK_calculated | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DPPCLKDelayCNVCCursor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DPPCLKDelayCNVCFormater | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DPPCLKDelaySCL | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DPPCLKDelaySCLLBOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DPPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DRAMChannelWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DRAMClockChangeLatencyOverride | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DRAMSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Downspreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.EffectiveDETLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.EffectiveDETLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.EffectiveDETPlusLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.EffectiveDETPlusLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.EffectiveFECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FCLKChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FabricAndDRAMBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FabricClock | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FinalFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FinalFillMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FractionOfUrgentBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FractionOfUrgentBandwidthImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.GPUVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.GlobalDPPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.HostVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.InitFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.LastPixelOfLineExtraWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.LinesInDETChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.LinesInDETLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxDCHUBToPSCLThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxDispclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxDppclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxPSCLToLBThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxTotalVActiveRDBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxVRatioPre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaximumReadBandwidthWithPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaximumReadBandwidthWithoutPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaximumSwathWidthInDETBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaximumSwathWidthInLineBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaximumSwathWidthInLineBufferChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaximumSwathWidthInLineBufferLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaximumSwathWidthSupport | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MinActiveDRAMClockChangeMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MinPixelChunkSizeBytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MinUrgentLatencySupportUs | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.NextMaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.NonUrgentLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.NumberOfChannels | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Outbpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PTEGroupSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PartOfBurstThatFitsInROB | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PlaneRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine2To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine4To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PlaneRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.RemainingFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ReturnBW | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ReturnBWToDCNPerState | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ReturnBandwidthToDCN | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ReturnBusWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.RoundTripPingLatencyCycles | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SMNLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SOCCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SREnterPlusExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SREnterPlusExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SRExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SRExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SmallestVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SrcActiveDrainRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.StutterBurstTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.StutterPeriod | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.StutterPeriodBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SurfaceRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SurfaceRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SwathWidthGranularityC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SwathWidthGranularityY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SwathWidthYCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TFinalxFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TInitXFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TWait | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TimeCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TotalBandwidthConsumedGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TotalDSCUnitsRequired | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TotalDataReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TotalNumberOfActiveOTG | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TotalRowReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TslvChk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.USRRetrainingLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentLatencySupportUsChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentLatencySupportUsLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.VBlankTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.VStartupMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.FCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.USRRetrainingWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.WritebackFCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackChromaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackInterfaceBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackLineBufferChromaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackLineBufferLumaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackLineBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackLumaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackMaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackMaxHSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackMaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackMaxVSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackMinHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackMinVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCBusTransportTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCFillBWOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCFillConstant | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCSlvChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCTSlvVreadyOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCTSlvVupdateOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCTSlvVupdateWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Z8StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.bpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.dst_x_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.dst_y_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.dummy5 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.dummy6 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.total_dcn_read_bw_with_flip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc_bios | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->funcs->get_lttpr_interop | 0,4930321500106088448 |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->golden_table.dc_golden_table_ver | 0-1 |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->regs | 7199441410276810752 |
| PARAM_VALUE | 0 | dc->vm_helper | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dc->vm_helper->num_vmid | 16 |
| PARAM_VALUE | 1 | pool | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.clk_src_count | 6 |
| PARAM_VALUE | 1 | pool->base.clock_sources | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dccg | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dccg->ctx | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dccg->funcs | 8922792151974961152 |
| PARAM_VALUE | 1 | pool->base.dp_clock_source | 0,4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dp_clock_source->ctx | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dp_clock_source->dp_clk_src | 1 |
| PARAM_VALUE | 1 | pool->base.dp_clock_source->funcs | 6417861851807330304 |
| PARAM_VALUE | 1 | pool->base.dp_clock_source->id | 8 |
| PARAM_VALUE | 1 | pool->base.funcs | 3789100280427196416 |
| PARAM_VALUE | 1 | pool->base.mpcc_count | 6 |
| PARAM_VALUE | 1 | pool->base.pipe_count | 6 |
| PARAM_VALUE | 1 | pool->base.res_cap | 3822701315463634944 |
| PARAM_VALUE | 1 | pool->base.res_cap->num_mpc_3dlut | 3 |
| PARAM_VALUE | 1 | pool->base.res_cap->num_timing_generator | 6 |
| PARAM_VALUE | 1 | pool->base.underlay_pipe_index | u32max |
| BUF_SIZE | 1 | pool | 1344 |
| BUF_SIZE | 1 | pool | 1344 |
| BUF_SIZE | 1 | pool->base.dccg | 56 |
| BUF_SIZE | 1 | pool->base.dp_clock_source | (-1),24 |
| BUF_SIZE | 1 | pool->base.funcs | 320 |
| BUF_SIZE | 1 | pool->base.res_cap | 84 |
| DATA_SOURCE | 0 | dc | $1 |
| DATA_SOURCE | 1 | pool | $2 |
| PREEMPT_ADD | <- disables preempt | ||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn303/dcn303_resource.c dcn303_resource_construct() -> init_soc_bounding_box()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dc | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dcn_arch | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_ram | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.bt2020 | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.gamma2_2 | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.hlg | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.pq | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.srgb | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_for_yuv | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.gamma_corr | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.hw_3d_lut | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.icsc | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.input_lut_shared | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ocsc | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_ram | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.bt2020 | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.hlg | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.pq | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.srgb | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.post_csc | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.upsp_pre_scaler | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.gamut_remap | 1 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.num_3dluts | 1 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ocsc | 1 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_ram | 1 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.bt2020 | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.hlg | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.pq | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.srgb | 0 |
| PARAM_VALUE | 0 | dc->caps.cursor_cache_size | 524288 |
| PARAM_VALUE | 0 | dc->caps.dmcub_support | 1 |
| PARAM_VALUE | 0 | dc->caps.dmdata_alloc_size | 2048 |
| PARAM_VALUE | 0 | dc->caps.dp_hdmi21_pcon_support | 1 |
| PARAM_VALUE | 0 | dc->caps.extended_aux_timeout_support | 1 |
| PARAM_VALUE | 0 | dc->caps.force_dp_tps4_for_cp2520 | 1 |
| PARAM_VALUE | 0 | dc->caps.hdmi_hpo | 1 |
| PARAM_VALUE | 0 | dc->caps.i2c_speed_in_khz | 100 |
| PARAM_VALUE | 0 | dc->caps.i2c_speed_in_khz_hdcp | 5 |
| PARAM_VALUE | 0 | dc->caps.mall_size_per_mem_channel | 4 |
| PARAM_VALUE | 0 | dc->caps.max_cursor_size | 256 |
| PARAM_VALUE | 0 | dc->caps.max_downscale_ratio | 600 |
| PARAM_VALUE | 0 | dc->caps.max_slave_planes | 1 |
| PARAM_VALUE | 0 | dc->caps.max_slave_rgb_planes | 1 |
| PARAM_VALUE | 0 | dc->caps.max_slave_yuv_planes | 1 |
| PARAM_VALUE | 0 | dc->caps.max_v_total | s16max |
| PARAM_VALUE | 0 | dc->caps.min_horizontal_blanking_period | 80 |
| PARAM_VALUE | 0 | dc->caps.post_blend_color_processing | 1 |
| PARAM_VALUE | 0 | dc->caps.vtotal_limited_by_fp2 | 1 |
| PARAM_VALUE | 0 | dc->config.dc_mode_clk_limit_support | 1 |
| PARAM_VALUE | 0 | dc->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->dc_bios | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->funcs->get_lttpr_interop | 0,4930321500106088448 |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->regs | 6071759369650024448 |
| PARAM_VALUE | 0 | dc->vm_helper | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dc->vm_helper->num_vmid | 16 |
| PARAM_VALUE | 1 | pool | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->clk_src_count | 2 |
| PARAM_VALUE | 1 | pool->clock_sources | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->dccg | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->dccg->ctx | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->dccg->funcs | 8922792151974961152 |
| PARAM_VALUE | 1 | pool->dp_clock_source | 0,4096-ptr_max |
| PARAM_VALUE | 1 | pool->dp_clock_source->ctx | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->dp_clock_source->dp_clk_src | 1 |
| PARAM_VALUE | 1 | pool->dp_clock_source->funcs | 6417861851807330304 |
| PARAM_VALUE | 1 | pool->dp_clock_source->id | 8 |
| PARAM_VALUE | 1 | pool->funcs | 5254278515118837760 |
| PARAM_VALUE | 1 | pool->mpcc_count | 2 |
| PARAM_VALUE | 1 | pool->pipe_count | 2 |
| PARAM_VALUE | 1 | pool->res_cap | 5513184862103576576 |
| PARAM_VALUE | 1 | pool->res_cap->num_mpc_3dlut | 1 |
| PARAM_VALUE | 1 | pool->res_cap->num_timing_generator | 2 |
| PARAM_VALUE | 1 | pool->underlay_pipe_index | u32max |
| BUF_SIZE | 1 | pool | 1344 |
| BUF_SIZE | 1 | pool | 1344 |
| BUF_SIZE | 1 | pool->dccg | 56 |
| BUF_SIZE | 1 | pool->dp_clock_source | (-1),24 |
| BUF_SIZE | 1 | pool->funcs | 320 |
| BUF_SIZE | 1 | pool->res_cap | 84 |
| DATA_SOURCE | 0 | dc | $1 |
| DATA_SOURCE | 1 | pool | $2 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn301/dcn301_resource.c dcn301_resource_construct() -> init_soc_bounding_box()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dc | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dcn_arch | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_ram | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.bt2020 | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.gamma2_2 | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.hlg | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.pq | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.srgb | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_for_yuv | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.gamma_corr | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.hw_3d_lut | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.icsc | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.input_lut_shared | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ocsc | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_ram | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.bt2020 | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.hlg | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.pq | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.srgb | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.post_csc | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.upsp_pre_scaler | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.gamut_remap | 1 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.num_3dluts | 2 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ocsc | 1 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_ram | 1 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.bt2020 | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.hlg | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.pq | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.srgb | 0 |
| PARAM_VALUE | 0 | dc->caps.dmcub_support | 1 |
| PARAM_VALUE | 0 | dc->caps.dmdata_alloc_size | 2048 |
| PARAM_VALUE | 0 | dc->caps.dp_hdmi21_pcon_support | 1 |
| PARAM_VALUE | 0 | dc->caps.extended_aux_timeout_support | 1 |
| PARAM_VALUE | 0 | dc->caps.force_dp_tps4_for_cp2520 | 1 |
| PARAM_VALUE | 0 | dc->caps.i2c_speed_in_khz | 100 |
| PARAM_VALUE | 0 | dc->caps.i2c_speed_in_khz_hdcp | 5 |
| PARAM_VALUE | 0 | dc->caps.is_apu | 1 |
| PARAM_VALUE | 0 | dc->caps.max_cursor_size | 256 |
| PARAM_VALUE | 0 | dc->caps.max_downscale_ratio | 600 |
| PARAM_VALUE | 0 | dc->caps.max_slave_planes | 2 |
| PARAM_VALUE | 0 | dc->caps.max_slave_rgb_planes | 2 |
| PARAM_VALUE | 0 | dc->caps.max_slave_yuv_planes | 2 |
| PARAM_VALUE | 0 | dc->caps.min_horizontal_blanking_period | 80 |
| PARAM_VALUE | 0 | dc->caps.post_blend_color_processing | 1 |
| PARAM_VALUE | 0 | dc->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->cgs_device | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->mes.saved_flags | 0-4294967295 |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | dc->ctx->cgs_device->adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | dc->ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.AverageDCCCompressionRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.AverageReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.BPP | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.BandwidthAvailableForImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.CriticalPoint | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.CursorBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.CursorChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DCFCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DCFCLKDeepSleep | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DETBufferSizeInTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLKRampingMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLKWithRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLKWithoutRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DISPCLK_calculated | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DPPCLKDelayCNVCCursor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DPPCLKDelayCNVCFormater | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DPPCLKDelaySCL | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DPPCLKDelaySCLLBOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DPPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DRAMChannelWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DRAMClockChangeLatencyOverride | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.DRAMSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Downspreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.EffectiveDETLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.EffectiveDETLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.EffectiveDETPlusLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.EffectiveDETPlusLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.EffectiveFECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FCLKChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FabricAndDRAMBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FabricClock | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FinalFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FinalFillMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FractionOfUrgentBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FractionOfUrgentBandwidthImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.GPUVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.GlobalDPPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.HostVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.InitFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.LastPixelOfLineExtraWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.LinesInDETChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.LinesInDETLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxDCHUBToPSCLThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxDispclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxDppclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxPSCLToLBThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxTotalVActiveRDBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxVRatioPre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaximumReadBandwidthWithPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaximumReadBandwidthWithoutPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaximumSwathWidthInDETBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaximumSwathWidthInLineBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaximumSwathWidthInLineBufferChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaximumSwathWidthInLineBufferLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MaximumSwathWidthSupport | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MinActiveDRAMClockChangeMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MinPixelChunkSizeBytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.MinUrgentLatencySupportUs | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.NextMaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.NonUrgentLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.NumberOfChannels | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Outbpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PTEGroupSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PartOfBurstThatFitsInROB | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PlaneRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine2To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine4To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.PlaneRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.RemainingFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ReturnBW | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ReturnBWToDCNPerState | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ReturnBandwidthToDCN | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ReturnBusWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.RoundTripPingLatencyCycles | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SMNLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SOCCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SREnterPlusExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SREnterPlusExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SRExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SRExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SmallestVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SrcActiveDrainRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.StutterBurstTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.StutterPeriod | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.StutterPeriodBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SurfaceRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SurfaceRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SwathWidthGranularityC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SwathWidthGranularityY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.SwathWidthYCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TFinalxFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TInitXFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TWait | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TimeCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TotalBandwidthConsumedGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TotalDSCUnitsRequired | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TotalDataReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TotalNumberOfActiveOTG | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TotalRowReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.TslvChk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.USRRetrainingLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentLatencySupportUsChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentLatencySupportUsLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.VBlankTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.VStartupMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.FCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.USRRetrainingWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.WritebackFCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Watermark.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackChromaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackInterfaceBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackLineBufferChromaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackLineBufferLumaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackLineBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackLumaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackMaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackMaxHSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackMaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackMaxVSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackMinHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackMinVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCBusTransportTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCFillBWOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCFillConstant | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCSlvChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCTSlvVreadyOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCTSlvVupdateOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCTSlvVupdateWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Z8StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.bpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.dst_x_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.dst_y_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.dummy5 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.dummy6 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.total_dcn_read_bw_with_flip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_dc_power_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc->dml2_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | dc->ctx->dc_bios | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->funcs->get_lttpr_interop | 0,4930321500106088448 |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->golden_table.dc_golden_table_ver | 0-1 |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->regs | 9087913002822713344 |
| PARAM_VALUE | 0 | dc->vm_helper | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dc->vm_helper->num_vmid | 16 |
| PARAM_VALUE | 1 | pool | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.clk_src_count | 4 |
| PARAM_VALUE | 1 | pool->base.clock_sources | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dccg | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dccg->ctx | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dccg->funcs | 5107064992383438848 |
| PARAM_VALUE | 1 | pool->base.dp_clock_source | 0,4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dp_clock_source->ctx | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dp_clock_source->dp_clk_src | 1 |
| PARAM_VALUE | 1 | pool->base.dp_clock_source->funcs | 6417861851807330304 |
| PARAM_VALUE | 1 | pool->base.dp_clock_source->id | 8 |
| PARAM_VALUE | 1 | pool->base.funcs | 930446810128629760 |
| PARAM_VALUE | 1 | pool->base.mpcc_count | 4 |
| PARAM_VALUE | 1 | pool->base.pipe_count | 4 |
| PARAM_VALUE | 1 | pool->base.res_cap | 5833214310444658688 |
| PARAM_VALUE | 1 | pool->base.res_cap->num_mpc_3dlut | 2 |
| PARAM_VALUE | 1 | pool->base.res_cap->num_pll | 2,4 |
| PARAM_VALUE | 1 | pool->base.res_cap->num_timing_generator | 4 |
| PARAM_VALUE | 1 | pool->base.underlay_pipe_index | u32max |
| BUF_SIZE | 1 | pool | 1344 |
| BUF_SIZE | 1 | pool | 1344 |
| BUF_SIZE | 1 | pool->base.dccg | 56 |
| BUF_SIZE | 1 | pool->base.dp_clock_source | (-1),24 |
| BUF_SIZE | 1 | pool->base.funcs | 320 |
| BUF_SIZE | 1 | pool->base.res_cap | 84 |
| DATA_SOURCE | 0 | dc | $1 |
| DATA_SOURCE | 1 | pool | $2 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn302/dcn302_resource.c dcn302_resource_construct() -> init_soc_bounding_box()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dc | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dcn_arch | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_ram | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.bt2020 | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.gamma2_2 | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.hlg | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.pq | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.srgb | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_for_yuv | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.gamma_corr | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.hw_3d_lut | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.icsc | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.input_lut_shared | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ocsc | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_ram | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.bt2020 | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.hlg | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.pq | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.srgb | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.post_csc | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.upsp_pre_scaler | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.gamut_remap | 1 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.num_3dluts | 2 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ocsc | 1 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_ram | 1 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.bt2020 | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.hlg | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.pq | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.srgb | 0 |
| PARAM_VALUE | 0 | dc->caps.cursor_cache_size | 524288 |
| PARAM_VALUE | 0 | dc->caps.dmcub_support | 1 |
| PARAM_VALUE | 0 | dc->caps.dmdata_alloc_size | 2048 |
| PARAM_VALUE | 0 | dc->caps.dp_hdmi21_pcon_support | 1 |
| PARAM_VALUE | 0 | dc->caps.extended_aux_timeout_support | 1 |
| PARAM_VALUE | 0 | dc->caps.force_dp_tps4_for_cp2520 | 1 |
| PARAM_VALUE | 0 | dc->caps.hdmi_hpo | 1 |
| PARAM_VALUE | 0 | dc->caps.i2c_speed_in_khz | 100 |
| PARAM_VALUE | 0 | dc->caps.i2c_speed_in_khz_hdcp | 5 |
| PARAM_VALUE | 0 | dc->caps.mall_size_per_mem_channel | 4 |
| PARAM_VALUE | 0 | dc->caps.max_cursor_size | 256 |
| PARAM_VALUE | 0 | dc->caps.max_downscale_ratio | 600 |
| PARAM_VALUE | 0 | dc->caps.max_slave_planes | 2 |
| PARAM_VALUE | 0 | dc->caps.max_slave_rgb_planes | 2 |
| PARAM_VALUE | 0 | dc->caps.max_slave_yuv_planes | 2 |
| PARAM_VALUE | 0 | dc->caps.max_v_total | s16max |
| PARAM_VALUE | 0 | dc->caps.min_horizontal_blanking_period | 80 |
| PARAM_VALUE | 0 | dc->caps.post_blend_color_processing | 1 |
| PARAM_VALUE | 0 | dc->caps.vtotal_limited_by_fp2 | 1 |
| PARAM_VALUE | 0 | dc->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->dc_bios | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->funcs->get_lttpr_caps | 0,4997199002862329856 |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->funcs->get_lttpr_interop | 0,4930321500106088448 |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->regs | 2753368048475029504 |
| PARAM_VALUE | 0 | dc->vm_helper | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dc->vm_helper->num_vmid | 16 |
| PARAM_VALUE | 1 | pool | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->clk_src_count | 5 |
| PARAM_VALUE | 1 | pool->clock_sources | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->dccg | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->dccg->ctx | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->dccg->funcs | 8922792151974961152 |
| PARAM_VALUE | 1 | pool->dp_clock_source | 0,4096-ptr_max |
| PARAM_VALUE | 1 | pool->dp_clock_source->ctx | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->dp_clock_source->dp_clk_src | 1 |
| PARAM_VALUE | 1 | pool->dp_clock_source->funcs | 6417861851807330304 |
| PARAM_VALUE | 1 | pool->dp_clock_source->id | 8 |
| PARAM_VALUE | 1 | pool->funcs | 7069267863387959296 |
| PARAM_VALUE | 1 | pool->mpcc_count | 5 |
| PARAM_VALUE | 1 | pool->pipe_count | 5 |
| PARAM_VALUE | 1 | pool->res_cap | 2574438292811743232 |
| PARAM_VALUE | 1 | pool->res_cap->num_mpc_3dlut | 2 |
| PARAM_VALUE | 1 | pool->res_cap->num_timing_generator | 5 |
| PARAM_VALUE | 1 | pool->underlay_pipe_index | u32max |
| BUF_SIZE | 1 | pool | 1344 |
| BUF_SIZE | 1 | pool | 1344 |
| BUF_SIZE | 1 | pool->dccg | 56 |
| BUF_SIZE | 1 | pool->dp_clock_source | (-1),24 |
| BUF_SIZE | 1 | pool->funcs | 320 |
| BUF_SIZE | 1 | pool->res_cap | 84 |
| DATA_SOURCE | 0 | dc | $1 |
| DATA_SOURCE | 1 | pool | $2 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn20/dcn20_resource.c dcn20_resource_construct() -> init_soc_bounding_box()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dc | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->bw_dceip | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->bw_vbios | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dcn_arch | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_ram | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.bt2020 | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.hlg | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.pq | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_caps.srgb | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.dgam_rom_for_yuv | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.gamma_corr | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.hw_3d_lut | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.icsc | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.input_lut_shared | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ocsc | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_ram | 1 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.bt2020 | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.hlg | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.pq | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.ogam_rom_caps.srgb | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.post_csc | 0 |
| PARAM_VALUE | 0 | dc->caps.color.dpp.upsp_pre_scaler | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.gamut_remap | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.num_3dluts | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ocsc | 1 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_ram | 1 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.bt2020 | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.hlg | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.pq | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.ogam_rom_caps.srgb | 0 |
| PARAM_VALUE | 0 | dc->caps.color.mpc.shared_3d_lut | 0 |
| PARAM_VALUE | 0 | dc->caps.dmcub_support | 1 |
| PARAM_VALUE | 0 | dc->caps.dmdata_alloc_size | 2048 |
| PARAM_VALUE | 0 | dc->caps.dp_hdmi21_pcon_support | 1 |
| PARAM_VALUE | 0 | dc->caps.extended_aux_timeout_support | 1 |
| PARAM_VALUE | 0 | dc->caps.force_dp_tps4_for_cp2520 | 1 |
| PARAM_VALUE | 0 | dc->caps.i2c_speed_in_khz | 100 |
| PARAM_VALUE | 0 | dc->caps.i2c_speed_in_khz_hdcp | 100 |
| PARAM_VALUE | 0 | dc->caps.max_cursor_size | 256 |
| PARAM_VALUE | 0 | dc->caps.max_downscale_ratio | 200 |
| PARAM_VALUE | 0 | dc->caps.max_slave_planes | 1 |
| PARAM_VALUE | 0 | dc->caps.max_slave_rgb_planes | 1 |
| PARAM_VALUE | 0 | dc->caps.max_slave_yuv_planes | 1 |
| PARAM_VALUE | 0 | dc->caps.min_horizontal_blanking_period | 80 |
| PARAM_VALUE | 0 | dc->caps.post_blend_color_processing | 1 |
| PARAM_VALUE | 0 | dc->config.disable_ips | 0-1,5-6 |
| PARAM_VALUE | 0 | dc->config.enable_mipi_converter_optimization | 1 |
| PARAM_VALUE | 0 | dc->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->asic_id.chip_id | 0-u16max |
| PARAM_VALUE | 0 | dc->ctx->asic_id.fake_paths_num | 0 |
| PARAM_VALUE | 0 | dc->ctx->asic_id.feature_flags | 0 |
| PARAM_VALUE | 0 | dc->ctx->asic_id.pci_revision_id | 0-255 |
| PARAM_VALUE | 0 | dc->ctx->asic_id.vram_type | 0 |
| PARAM_VALUE | 0 | dc->ctx->clk_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->created_bios | 1 |
| PARAM_VALUE | 0 | dc->ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->dc_bios | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->golden_table.dc_golden_table_ver | 0-1 |
| PARAM_VALUE | 0 | dc->ctx->dc_bios->regs | 5079046202845396992 |
| PARAM_VALUE | 0 | dc->ctx->dc_sink_id_count | 0 |
| PARAM_VALUE | 0 | dc->ctx->dc_stream_id_count | 0 |
| PARAM_VALUE | 0 | dc->ctx->dce_environment | 0 |
| PARAM_VALUE | 0 | dc->ctx->dce_version | 0-11,13-33 |
| PARAM_VALUE | 0 | dc->ctx->dcn_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->driver_context | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->gpio_service | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->gpio_service->factory.funcs->get_ddc_pin | 4282884732176863232 |
| PARAM_VALUE | 0 | dc->ctx->gpio_service->factory.funcs->get_generic_pin | 0,1865128202610618368 |
| PARAM_VALUE | 0 | dc->ctx->gpio_service->factory.funcs->get_hpd_pin | 7934808305696059392 |
| PARAM_VALUE | 0 | dc->ctx->gpio_service->factory.funcs->init_ddc_data | 2001552147147407360 |
| PARAM_VALUE | 0 | dc->ctx->gpio_service->factory.funcs->init_generic | 0,2515651427700535296 |
| PARAM_VALUE | 0 | dc->ctx->gpio_service->factory.funcs->init_hpd | 4938802009827868672 |
| PARAM_VALUE | 0 | dc->ctx->logger | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->nbio_reg_offsets | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->ctx->perf_trace | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->dcn_ip | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->dcn_ip->det_buffer_size_in_kbyte | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_ip->dispclk_ramping_margin | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_ip->dpp_output_buffer_pixels | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_ip->max_hscl_ratio | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_ip->max_vscl_ratio | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_ip->opp_output_buffer_lines | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_ip->pixel_chunk_size_in_kbyte | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_ip->rob_buffer_size_in_kbyte | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_ip->under_scan_factor | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->dcn_soc->dcfclkv_max0p9 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->dcfclkv_mid0p72 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->dcfclkv_min0p65 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->dcfclkv_nom0p8 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->downspreading | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->dram_clock_change_latency | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->fabric_and_dram_bandwidth_vmax0p9 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->fabric_and_dram_bandwidth_vmid0p72 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->fabric_and_dram_bandwidth_vmin0p65 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->fabric_and_dram_bandwidth_vnom0p8 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->max_dispclk_vmax0p9 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->max_dispclk_vmid0p72 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->max_dispclk_vmin0p65 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->max_dispclk_vnom0p8 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->max_dppclk_vmax0p9 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->max_dppclk_vmid0p72 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->max_dppclk_vmin0p65 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->max_dppclk_vnom0p8 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->percent_disp_bw_limit | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->percent_of_ideal_drambw_received_after_urg_latency | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->phyclkv_max0p9 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->phyclkv_mid0p72 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->phyclkv_min0p65 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->phyclkv_nom0p8 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->socclk | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->sr_enter_plus_exit_time | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->sr_exit_time | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->urgent_latency | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dcn_soc->write_back_latency | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | dc->dml.logger | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->dml.logger->dev | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->link_srv->add_remote_sink | 9076517731293138944 |
| PARAM_VALUE | 0 | dc->link_srv->aux_transfer_raw | 6184897925250682880 |
| PARAM_VALUE | 0 | dc->link_srv->aux_transfer_with_retries_no_mutex | 8191849773748219904 |
| PARAM_VALUE | 0 | dc->link_srv->blank_all_dp_displays | 3062706639890767872 |
| PARAM_VALUE | 0 | dc->link_srv->blank_all_edp_displays | 1337897998848856064 |
| PARAM_VALUE | 0 | dc->link_srv->blank_dp_stream | 4130531007472275456 |
| PARAM_VALUE | 0 | dc->link_srv->bw_kbps_from_raw_frl_link_rate_data | 5443108731991064576 |
| PARAM_VALUE | 0 | dc->link_srv->clear_dprx_states | 8047906751577083904 |
| PARAM_VALUE | 0 | dc->link_srv->configure_fixed_vs_pe_retimer | 7700521247233347584 |
| PARAM_VALUE | 0 | dc->link_srv->create_ddc_service | 7832651270894399488 |
| PARAM_VALUE | 0 | dc->link_srv->create_link | 9211926282304876544 |
| PARAM_VALUE | 0 | dc->link_srv->destroy_ddc_service | 5376478022546808832 |
| PARAM_VALUE | 0 | dc->link_srv->destroy_link | 2219806400150880256 |
| PARAM_VALUE | 0 | dc->link_srv->detect_connection_type | 3800683925153353728 |
| PARAM_VALUE | 0 | dc->link_srv->detect_link | 7839230909067685888 |
| PARAM_VALUE | 0 | dc->link_srv->disable_hpd | 1862756593108987904 |
| PARAM_VALUE | 0 | dc->link_srv->dp_decide_link_settings | 7562797703492784128 |
| PARAM_VALUE | 0 | dc->link_srv->dp_decide_lttpr_mode | 9007828322323783680 |
| PARAM_VALUE | 0 | dc->link_srv->dp_decide_tunnel_settings | 4120151607367180288 |
| PARAM_VALUE | 0 | dc->link_srv->dp_get_encoding_format | 7260582977303949312 |
| PARAM_VALUE | 0 | dc->link_srv->dp_get_lttpr_count | 3705856472359297024 |
| PARAM_VALUE | 0 | dc->link_srv->dp_get_max_link_enc_cap | 7494754533451419648 |
| PARAM_VALUE | 0 | dc->link_srv->dp_get_verified_link_cap | 5541961110444740608 |
| PARAM_VALUE | 0 | dc->link_srv->dp_handle_automated_test | 2425689061424328704 |
| PARAM_VALUE | 0 | dc->link_srv->dp_handle_hpd_rx_irq | 6404512166640058368 |
| PARAM_VALUE | 0 | dc->link_srv->dp_handle_link_loss | 3781263260251828224 |
| PARAM_VALUE | 0 | dc->link_srv->dp_is_128b_132b_signal | 3321939004289888256 |
| PARAM_VALUE | 0 | dc->link_srv->dp_is_fec_supported | 2409663632516452352 |
| PARAM_VALUE | 0 | dc->link_srv->dp_is_sink_present | 7237285772004687872 |
| PARAM_VALUE | 0 | dc->link_srv->dp_link_bandwidth_kbps | 5700442124585824256 |
| PARAM_VALUE | 0 | dc->link_srv->dp_overwrite_extended_receiver_cap | 5588651565142474752 |
| PARAM_VALUE | 0 | dc->link_srv->dp_parse_link_loss_status | 2503334682384261120 |
| PARAM_VALUE | 0 | dc->link_srv->dp_pr_enable | 8450853940774551552 |
| PARAM_VALUE | 0 | dc->link_srv->dp_pr_get_panel_inst | 211876778785734656 |
| PARAM_VALUE | 0 | dc->link_srv->dp_pr_get_state | 8377610779003473920 |
| PARAM_VALUE | 0 | dc->link_srv->dp_pr_set_general_cmd | 7643257951212253184 |
| PARAM_VALUE | 0 | dc->link_srv->dp_pr_update_state | 191135826991681536 |
| PARAM_VALUE | 0 | dc->link_srv->dp_read_hpd_rx_irq_data | 7318563480050008064 |
| PARAM_VALUE | 0 | dc->link_srv->dp_required_hblank_size_bytes | 960232989954203648 |
| PARAM_VALUE | 0 | dc->link_srv->dp_set_drive_settings | 914125183281348608 |
| PARAM_VALUE | 0 | dc->link_srv->dp_set_preferred_link_settings | 4574705188990943232 |
| PARAM_VALUE | 0 | dc->link_srv->dp_set_preferred_training_settings | 6375614430006497280 |
| PARAM_VALUE | 0 | dc->link_srv->dp_set_test_pattern | 2540280962061012992 |
| PARAM_VALUE | 0 | dc->link_srv->dp_setup_replay | 4657657947283656704 |
| PARAM_VALUE | 0 | dc->link_srv->dp_should_allow_hpd_rx_irq | 2174568008836190208 |
| PARAM_VALUE | 0 | dc->link_srv->dp_should_enable_fec | 7408838822574968832 |
| PARAM_VALUE | 0 | dc->link_srv->dp_trace_get_edp_poweroff_timestamp | 7784859674832814080 |
| PARAM_VALUE | 0 | dc->link_srv->dp_trace_get_edp_poweron_timestamp | 3523181926946795520 |
| PARAM_VALUE | 0 | dc->link_srv->dp_trace_get_link_loss_count | 1586740594736029696 |
| PARAM_VALUE | 0 | dc->link_srv->dp_trace_get_lt_counts | 5599770255860387840 |
| PARAM_VALUE | 0 | dc->link_srv->dp_trace_get_lt_end_timestamp | 5682549624942587904 |
| PARAM_VALUE | 0 | dc->link_srv->dp_trace_is_initialized | 2499476435406245888 |
| PARAM_VALUE | 0 | dc->link_srv->dp_trace_is_logged | 4943729181922439168 |
| PARAM_VALUE | 0 | dc->link_srv->dp_trace_set_edp_power_timestamp | 576767134743252992 |
| PARAM_VALUE | 0 | dc->link_srv->dp_trace_set_is_logged_flag | 4613052606841581568 |
| PARAM_VALUE | 0 | dc->link_srv->dp_trace_source_sequence | 6385750016694743040 |
| PARAM_VALUE | 0 | dc->link_srv->dpcd_write_rx_power_ctrl | 622289128499933184 |
| PARAM_VALUE | 0 | dc->link_srv->dpia_handle_usb4_bandwidth_allocation_for_link | 1650205802342703104 |
| PARAM_VALUE | 0 | dc->link_srv->edp_add_delay_for_T9 | 5217604216087072768 |
| PARAM_VALUE | 0 | dc->link_srv->edp_backlight_enable_aux | 6850617849126273024 |
| PARAM_VALUE | 0 | dc->link_srv->edp_decide_link_settings | 6117019147840188416 |
| PARAM_VALUE | 0 | dc->link_srv->edp_get_alpm_support | 4586926344437133312 |
| PARAM_VALUE | 0 | dc->link_srv->edp_get_backlight_level | 584812511024599040 |
| PARAM_VALUE | 0 | dc->link_srv->edp_get_backlight_level_nits | 5043105931275202560 |
| PARAM_VALUE | 0 | dc->link_srv->edp_get_psr_residency | 8948639825959137280 |
| PARAM_VALUE | 0 | dc->link_srv->edp_get_psr_state | 6064680502481440768 |
| PARAM_VALUE | 0 | dc->link_srv->edp_get_replay_state | 2070345098823053312 |
| PARAM_VALUE | 0 | dc->link_srv->edp_get_target_backlight_pwm | 6856580697323495424 |
| PARAM_VALUE | 0 | dc->link_srv->edp_is_ilr_optimization_required | 3565902183385190400 |
| PARAM_VALUE | 0 | dc->link_srv->edp_panel_backlight_power_on | 8143941327261708288 |
| PARAM_VALUE | 0 | dc->link_srv->edp_power_alpm_dpcd_enable | 2045511377254178816 |
| PARAM_VALUE | 0 | dc->link_srv->edp_receiver_ready_T7 | 8870767567230312448 |
| PARAM_VALUE | 0 | dc->link_srv->edp_receiver_ready_T9 | 6655881455531134976 |
| PARAM_VALUE | 0 | dc->link_srv->edp_replay_residency | 1125491693924761600 |
| PARAM_VALUE | 0 | dc->link_srv->edp_send_replay_cmd | 4247587011737317376 |
| PARAM_VALUE | 0 | dc->link_srv->edp_set_backlight_level | 3628504151321059328 |
| PARAM_VALUE | 0 | dc->link_srv->edp_set_backlight_level_nits | 4657942554457055232 |
| PARAM_VALUE | 0 | dc->link_srv->edp_set_coasting_vtotal | 6138712599653806080 |
| PARAM_VALUE | 0 | dc->link_srv->edp_set_panel_power | 93509411040079872 |
| PARAM_VALUE | 0 | dc->link_srv->edp_set_psr_allow_active | 5267700290689417216 |
| PARAM_VALUE | 0 | dc->link_srv->edp_set_replay_allow_active | 3314241084820905984 |
| PARAM_VALUE | 0 | dc->link_srv->edp_set_replay_power_opt_and_coasting_vtotal | 5557163660977225728 |
| PARAM_VALUE | 0 | dc->link_srv->edp_set_sink_vtotal_in_psr_active | 2094229406156566528 |
| PARAM_VALUE | 0 | dc->link_srv->edp_setup_psr | 4668127218675904512 |
| PARAM_VALUE | 0 | dc->link_srv->edp_wait_for_t12 | 6620406079219658752 |
| PARAM_VALUE | 0 | dc->link_srv->enable_hpd | 5368476439889612800 |
| PARAM_VALUE | 0 | dc->link_srv->enable_hpd_filter | 8769713164331589632 |
| PARAM_VALUE | 0 | dc->link_srv->frl_link_bandwidth_kbps | 646131596734627840 |
| PARAM_VALUE | 0 | dc->link_srv->frl_margin_check_uncompressed_video | 326462611542417408 |
| PARAM_VALUE | 0 | dc->link_srv->get_aux_defer_delay | 5804002490577776640 |
| PARAM_VALUE | 0 | dc->link_srv->get_cur_link_res | 9140490403530911744 |
| PARAM_VALUE | 0 | dc->link_srv->get_cur_res_map | 8035441965963599872 |
| PARAM_VALUE | 0 | dc->link_srv->get_ddc_aux_inst | 433063531585961984 |
| PARAM_VALUE | 0 | dc->link_srv->get_hpd_state | 7737069629804974080 |
| PARAM_VALUE | 0 | dc->link_srv->get_status | 1164213076346134528 |
| PARAM_VALUE | 0 | dc->link_srv->hdmi_frl_get_verified_link_cap | 7305608898495053824 |
| PARAM_VALUE | 0 | dc->link_srv->hdmi_frl_poll_status_flag | 3146507925875740672 |
| PARAM_VALUE | 0 | dc->link_srv->hdmi_frl_set_preferred_link_settings | 3627382200555405312 |
| PARAM_VALUE | 0 | dc->link_srv->increase_mst_payload | 7698245840713158656 |
| PARAM_VALUE | 0 | dc->link_srv->is_hdcp1x_supported | 7817360459340906496 |
| PARAM_VALUE | 0 | dc->link_srv->is_hdcp2x_supported | 8560565107932532736 |
| PARAM_VALUE | 0 | dc->link_srv->is_in_aux_transaction_mode | 3354028576361013248 |
| PARAM_VALUE | 0 | dc->link_srv->mst_decide_link_encoding_format | 5839795692496973824 |
| PARAM_VALUE | 0 | dc->link_srv->query_ddc_data | 2211985988818329600 |
| PARAM_VALUE | 0 | dc->link_srv->reduce_mst_payload | 7031839850321068032 |
| PARAM_VALUE | 0 | dc->link_srv->remove_remote_sink | 7108513410666143744 |
| PARAM_VALUE | 0 | dc->link_srv->reset_cur_dp_mst_topology | 5781083628949475328 |
| PARAM_VALUE | 0 | dc->link_srv->restore_res_map | 7893335428769452032 |
| PARAM_VALUE | 0 | dc->link_srv->resume | 4971388040439148544 |
| PARAM_VALUE | 0 | dc->link_srv->set_dpms_off | 8142654691657052160 |
| PARAM_VALUE | 0 | dc->link_srv->set_dpms_on | 3006057166824923136 |
| PARAM_VALUE | 0 | dc->link_srv->set_dsc_enable | 2419209840692473856 |
| PARAM_VALUE | 0 | dc->link_srv->set_dsc_on_stream | 618901950105587712 |
| PARAM_VALUE | 0 | dc->link_srv->update_dsc_config | 6156946181965287424 |
| PARAM_VALUE | 0 | dc->link_srv->validate_dp_tunnel_bandwidth | 6724603402350641152 |
| PARAM_VALUE | 0 | dc->link_srv->validate_mode_timing | 7793285224581373952 |
| PARAM_VALUE | 0 | dc->link_srv->wait_for_unlocked | 4318489144252755968 |
| PARAM_VALUE | 0 | dc->vm_helper | 4096-ptr_max |
| PARAM_VALUE | 0 | dc->work_arounds.dedcn20_305_wa | 1 |
| PARAM_VALUE | 1 | pool | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.abm | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.abm->ctx | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.abm->dmcu_is_running | 0 |
| PARAM_VALUE | 1 | pool->base.abm->funcs | 8193395357008039936 |
| PARAM_VALUE | 1 | pool->base.clk_src_count | 6 |
| PARAM_VALUE | 1 | pool->base.clock_sources | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dccg | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dccg->ctx | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dccg->funcs | 3851403862200582144 |
| PARAM_VALUE | 1 | pool->base.dmcu | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dmcu->ctx | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dmcu->funcs | 1124573331587444736 |
| PARAM_VALUE | 1 | pool->base.dp_clock_source | 0,4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dp_clock_source->ctx | 4096-ptr_max |
| PARAM_VALUE | 1 | pool->base.dp_clock_source->dp_clk_src | 1 |
| PARAM_VALUE | 1 | pool->base.dp_clock_source->funcs | 1591686813150580736 |
| PARAM_VALUE | 1 | pool->base.dp_clock_source->id | 8 |
| PARAM_VALUE | 1 | pool->base.funcs | 2481490828871737344 |
| PARAM_VALUE | 1 | pool->base.mpcc_count | 5-6 |
| PARAM_VALUE | 1 | pool->base.pipe_count | 5-6 |
| PARAM_VALUE | 1 | pool->base.res_cap | 858842393660723200,2676301507103608832 |
| PARAM_VALUE | 1 | pool->base.underlay_pipe_index | u32max |
| BUF_SIZE | 0 | dc->bw_dceip | 360 |
| BUF_SIZE | 0 | dc->bw_vbios | 256 |
| BUF_SIZE | 0 | dc->dcn_ip | 136 |
| BUF_SIZE | 0 | dc->dcn_soc | 140 |
| BUF_SIZE | 0 | dc->vm_helper | 52 |
| BUF_SIZE | 1 | pool | 1344 |
| BUF_SIZE | 1 | pool | 1344 |
| BUF_SIZE | 1 | pool->base.abm | 24 |
| BUF_SIZE | 1 | pool->base.dccg | 56 |
| BUF_SIZE | 1 | pool->base.dmcu | 48 |
| BUF_SIZE | 1 | pool->base.dp_clock_source | (-1),24 |
| BUF_SIZE | 1 | pool->base.funcs | 320 |
| BUF_SIZE | 1 | pool->base.pp_smu | (-1),136 |
| BUF_SIZE | 1 | pool->base.res_cap | 84 |
| CAPPED_DATA | 0 | dc->caps.color.mpc.num_rmcm_3dluts | 1 |
| DATA_SOURCE | 0 | dc | $1 |
| DATA_SOURCE | 1 | pool | $2 |
| FUZZY_MAX | 1 | pool->base.mpcc_count | 6 |
| FUZZY_MAX | 1 | pool->base.pipe_count | 6 |
| BIT_INFO | 1 | pool->base.mpcc_count | 0x4,0x7 |
| BIT_INFO | 1 | pool->base.pipe_count | 0x4,0x7 |
| BIT_INFO | 1 | pool->base.res_cap | 0x120200a00009000,0x2fef3a9bd2f1d000 |
| HARD_MAX | 1 | pool->base.mpcc_count | 6 |
| HARD_MAX | 1 | pool->base.pipe_count | 6 |
| RX_PATH | |||
| TASK_NOT_RUNNING |