Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 4 files:
- drivers/gpu/drm/i915/display/i9xx_plane.c
- drivers/gpu/drm/i915/display/intel_display_irq.c, line 1748
- drivers/gpu/drm/i915/display/intel_display_rps.c, line 95
- drivers/gpu/drm/i915/display/intel_fifo_underrun.c
Smatch caller information:
drivers/gpu/drm/i915/display/i9xx_plane.c ilk_primary_enable_flip_done() -> ilk_enable_display_irq()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display->irq.lock.rlock.dep_map->name | 0-255 |
| PREEMPT_ADD | <- disables preempt | ||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | irq | ||
| LOCK2 | 0 | &display->irq.lock | |
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_display)->irq.lock |
drivers/gpu/drm/i915/display/i9xx_plane.c ivb_primary_enable_flip_done() -> ilk_enable_display_irq()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display->irq.lock.rlock.dep_map->name | 0-255 |
| PREEMPT_ADD | <- disables preempt | ||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | irq | ||
| LOCK2 | 0 | &display->irq.lock | |
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_display)->irq.lock |
drivers/gpu/drm/i915/display/intel_fifo_underrun.c ilk_set_fifo_underrun_reporting() -> ilk_enable_display_irq()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->info.__device_info | 4096-ptr_max |
| PARAM_VALUE | 0 | display->irq.funcs->handler | 2192072823877971968,2792595683100205056,5955815596145336320,7942455435531735040,8138603768813838336,8705323516099022848 |
| PARAM_VALUE | 0 | display->power.domains.power_wells->count | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.power_wells->hw_enabled | 0-1 |
| PARAM_VALUE | 0 | *display->irq.de_pipe_imr_mask | 0-4294967295 |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 1 | bits | 1,256 |
| DATA_SOURCE | 0 | display | $0 |
| FUZZY_MAX | 1 | bits | 256 |
| BIT_INFO | 1 | bits | 0x0,0x101 |
| HARD_MAX | 1 | bits | 256 |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | display->drm->mode_config.object_idr.idr_rt.xa_flags | 0,67108864-u32max |
| HOST_DATA | 0 | display->drm->mode_config.tile_idr.idr_rt.xa_flags | 0,67108864-u32max |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-1073741835 |
| LOCK2 | flags | ||
| LOCK2 | 0 | &display->irq.lock | |
| TYPE_LOCK | (struct intel_display)->irq.lock |
drivers/gpu/drm/i915/display/intel_fifo_underrun.c ivb_set_fifo_underrun_reporting() -> ilk_enable_display_irq()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->info.__device_info | 4096-ptr_max |
| PARAM_VALUE | 0 | display->irq.funcs->handler | 2192072823877971968,2792595683100205056,5955815596145336320,7942455435531735040,8138603768813838336,8705323516099022848 |
| PARAM_VALUE | 0 | display->params.enable_dmc_wl | 0-1 |
| PARAM_VALUE | 0 | display->platform.ironlake | 0 |
| PARAM_VALUE | 0 | display->platform.sandybridge | 0 |
| PARAM_VALUE | 0 | display->power.domains.power_wells->count | s32min-s32max |
| PARAM_VALUE | 0 | display->power.domains.power_wells->hw_enabled | 0-1 |
| PARAM_VALUE | 0 | display->wl.taken | 1 |
| PARAM_VALUE | 0 | display->wl.work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | *display->irq.de_pipe_imr_mask | 0-4294967295 |
| PARAM_VALUE | 0 | *display->irq.pipestat_irq_mask | 0-4294967295 |
| PARAM_VALUE | 1 | bits | 1073741824 |
| DATA_SOURCE | 0 | display | $0 |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | display->drm->mode_config.object_idr.idr_rt.xa_flags | 0,67108864-u32max |
| HOST_DATA | 0 | display->drm->mode_config.tile_idr.idr_rt.xa_flags | 0,67108864-u32max |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-1073741835 |
| LOCK2 | flags | ||
| LOCK2 | 0 | &display->irq.lock | |
| TYPE_LOCK | (struct intel_display)->irq.lock |
drivers/gpu/drm/i915/display/intel_display_irq.c ilk_enable_vblank() -> ilk_enable_display_irq()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PREEMPT_ADD | <- disables preempt | ||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | &dev->vbl_lock | ||
| LOCK2 | &dev->vblank_time_lock | ||
| LOCK2 | irqflags | ||
| LOCK2 | 0 | &display->irq.lock | |
| HALF_LOCKED2 | &dev->event_lock | ||
| HALF_LOCKED2 | irq | ||
| TYPE_LOCK | (struct drm_device)->vbl_lock | ||
| TYPE_LOCK | (struct drm_device)->vblank_time_lock | ||
| TYPE_LOCK | (struct intel_display)->irq.lock |
drivers/gpu/drm/i915/display/intel_display_rps.c ilk_display_rps_enable() -> ilk_enable_display_irq()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display->irq.lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | bits | 33554432 |
| DATA_SOURCE | 0 | display | $0 |
| PREEMPT_ADD | <- disables preempt | ||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | global &mchdev_lock | ||
| LOCK2 | irq | ||
| LOCK2 | 0 | &display->irq.lock | |
| HALF_LOCKED2 | __flags | ||
| TYPE_LOCK | (struct intel_display)->irq.lock |