i915_power_well_instance identifier - Linux source code next-20260811

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linux

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FIXME
- FIXME
  - next-20260811

Defined in 1 files as a struct:

drivers/gpu/drm/i915/display/intel_display_power_well.h, line 53 (as a struct)

Defined in 1 files as a function:

drivers/gpu/drm/i915/display/intel_display_power_well.c, line 87 (as a function)

Referenced in 3 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_display_power_well.c bxt_dpio_cmn_power_well_disable() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c bxt_dpio_cmn_power_well_enable() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c bxt_dpio_cmn_power_well_enabled() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA	0	power_well->hw_enabled	0-1[c]
HALF_LOCKED2		&power_domains->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c bxt_verify_dpio_phy_power_wells() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
HALF_LOCKED2		&power_domains->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c bxt_verify_dpio_phy_power_wells() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
HALF_LOCKED2		&power_domains->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c bxt_verify_dpio_phy_power_wells() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
HALF_LOCKED2		&power_domains->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c chv_dpio_cmn_power_well_disable() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c chv_dpio_cmn_power_well_enable() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c hsw_power_well_disable() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c hsw_power_well_enable() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c hsw_power_well_enabled() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA	0	power_well->hw_enabled	0-1[c]
HALF_LOCKED2		&power_domains->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c hsw_power_well_enabled() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA	0	power_well->hw_enabled	0-1[c]
HALF_LOCKED2		&power_domains->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c hsw_power_well_sync_hw() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA	0	power_well->hw_enabled	0-1[c]
LOCK2		&power_domains->lock
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c hsw_wait_for_power_well_disable() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c hsw_wait_for_power_well_enable() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c icl_aux_pw_to_ch() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$0
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c icl_combo_phy_aux_power_well_disable() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c icl_combo_phy_aux_power_well_enable() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c icl_tc_phy_aux_power_well_enable() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c icl_tc_phy_aux_power_well_enable() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c intel_power_well_name() -> i915_power_well_instance()

Type	Parameter	Key	Value
DATA_SOURCE	0	power_well	$0
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&m->lock
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c intel_power_well_put() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c intel_power_well_put() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c lookup_power_well() -> i915_power_well_instance()

Type	Parameter	Key	Value
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&power_domains->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c vlv_power_well_enabled() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA	0	power_well->hw_enabled	0-1[c]
HALF_LOCKED2		&power_domains->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c vlv_set_power_well() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c xelpdp_aux_power_well_disable() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c xelpdp_aux_power_well_enable() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
LOCK2		&power_domains->lock
HALF_LOCKED2		&display->dpll.lock
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex
HALF_LOCKED2		&display->gmbus.mutex
TYPE_LOCK		(struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c xelpdp_aux_power_well_enabled() -> i915_power_well_instance()

Type	Parameter	Key	Value
PARAM_VALUE	0	power_well	4096-ptr_max
PARAM_VALUE	0	power_well->desc	4096-ptr_max
DATA_SOURCE	0	power_well	$1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA	0	power_well->hw_enabled	0-1[c]
HALF_LOCKED2		&power_domains->lock