Defined in 2 files as a function:

Referenced in 3 files:

Smatch caller information:

drivers/gpu/host1x/hw/host1x05.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x05.c submit_setclass() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x05.c submit_wait() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/crypto/tegra/tegra-se-key.c tegra_key_prep_ins_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1
RX_PATH
TASK_NOT_RUNNING
LOCK2 global &kslt_lock

drivers/gpu/host1x/hw/host1x10.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x10.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x10.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x10.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x10.c submit_gathers() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x10.c submit_setclass() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
HALF_LOCKED2 &ch->cdma.lock
HALF_LOCKED2 &ch->submitlock

drivers/gpu/host1x/hw/host1x10.c submit_wait() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
HALF_LOCKED2 &ch->cdma.lock
HALF_LOCKED2 &ch->submitlock

drivers/gpu/host1x/hw/host1x02.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x02.c submit_setclass() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x02.c submit_wait() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x07.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x07.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x07.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x07.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x07.c submit_gathers() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x07.c submit_setclass() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x07.c submit_wait() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x06.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x06.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x06.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x06.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x06.c submit_gathers() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x06.c submit_setclass() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x06.c submit_wait() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x08.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x08.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x08.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x08.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x08.c submit_gathers() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x08.c submit_setclass() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x08.c submit_wait() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x01.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x01.c submit_setclass() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x04.c channel_program_cdma() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x04.c submit_setclass() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/gpu/host1x/hw/host1x04.c submit_wait() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &ch->cdma.lock
LOCK2 &ch->submitlock
HALF_LOCKED2 &fpriv->lock
TYPE_LOCK (struct host1x_cdma)->lock
TYPE_LOCK (struct host1x_channel)->submitlock

drivers/crypto/tegra/tegra-se-hash.c tegra_sha_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_aes_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_aes_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_aes_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_cbcmac_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_cbcmac_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_cbcmac_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_cmac_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_cmac_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_cmac_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_ctr_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_ctr_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_ctr_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_gcm_crypt_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_gcm_crypt_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_gcm_crypt_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_gcm_prep_final_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_gcm_prep_final_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_gmac_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_gmac_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 1 count 1

drivers/crypto/tegra/tegra-se-aes.c tegra_gmac_prep_cmd() -> host1x_opcode_nonincr()

Type Parameter Key Value
PARAM_VALUE 0 offset 0
PARAM_VALUE 1 count 1