| PARAM_VALUE |
0 |
rtwdev |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->agg_limit.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->agg_limit.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->bfee_ctrl.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->bfee_ctrl.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->check_mac_en |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->muedca_ctrl.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->muedca_ctrl.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->narrow_bw_ru_dis.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->narrow_bw_ru_dis.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->ra_agg_limit.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->ra_agg_limit.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->txcnt_limit.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->txcnt_limit.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->wow_ctrl.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->wow_ctrl.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->page_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->rrsr_cfgs->ref_rate.mask |
2-4,7-8,15-16,31-32,56,63-64,128,192,240,255-256,448,511-512,514,992,1024,1536,2047-2048,3072,3584,3840,4032,4096,6144,8192,16383-16384,24576,28672,31744,65280,u16max,98304,130560,131072,229376,258048,261632,262144-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->rrsr_cfgs->rsc.mask |
2-4,7-8,15-16,31-32,56,63-64,128,192,240,255-256,448,511-512,514,992,1024,1536,2047-2048,3072,3584,3840,4032,4096,6144,8192,16383-16384,24576,28672,31744,65280,u16max,98304,130560,131072,229376,258048,261632,262144-u32max |
| PARAM_VALUE |
0 |
rtwdev->io->write16 |
432860481457860608,1128088019024625664 |
| PARAM_VALUE |
0 |
rtwdev->mac.hfc_param.ch_cfg->grp |
0-1 |
| PARAM_VALUE |
0 |
rtwdev->mac.hfc_param.ch_cfg->max |
0,196,210,222,226,311,341-344,402,601,603,606,730,732,742-743,1614,1641,1896 |
| PARAM_VALUE |
0 |
rtwdev->mac.hfc_param.ch_cfg->min |
0,2,4-5,13,15-16,18,22,24,32,40,54,128 |
| PARAM_VALUE |
0 |
rtwdev->rfk_mcc.data->table_idx |
0-2 |
| DATA_SOURCE |
0 |
rtwdev |
$0 |
| NOCHECK_CALL |
|
|
|