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Defined in 1 files as a function:

Referenced in 2 files:

Smatch caller information:

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_crtc_atomic_disable() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 560
PARAM_VALUE 2 value 0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_crtc_atomic_enable() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 560
PARAM_VALUE 2 value 1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_crtc_cleanup() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 560
PARAM_VALUE 2 value 0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 global &component_mutex
HALF_LOCKED2 global &xenwatch_mutex

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_crtc_disable_vblank() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 24
BIT_INFO 2 value 0x0,0xfffffffb
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 value 0-u32max
LOCK2 &dev->vbl_lock
LOCK2 &dev->vblank_time_lock
HALF_LOCKED2 &dev->event_lock
HALF_LOCKED2 irq
HALF_LOCKED2 irqflags
TYPE_LOCK (struct drm_device)->vbl_lock
TYPE_LOCK (struct drm_device)->vblank_time_lock

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_crtc_enable_vblank() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 24
PARAM_VALUE 2 value 0,4-u32max
BIT_INFO 2 value 0x4,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 value 0,4-u32max
LOCK2 &dev->vbl_lock
LOCK2 &dev->vblank_time_lock
HALF_LOCKED2 &dev->event_lock
HALF_LOCKED2 irq
TYPE_LOCK (struct drm_device)->vbl_lock
TYPE_LOCK (struct drm_device)->vblank_time_lock

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_crtc_mode_set_nofb() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 272
PARAM_VALUE 2 value 3856
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_crtc_mode_set_nofb() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 520
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 value unit_byte
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_crtc_mode_set_nofb() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 516
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 value unit_byte
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_crtc_mode_set_nofb() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 524
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 value unit_byte
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_crtc_mode_set_nofb() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 512
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 value unit_byte
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_crtc_mode_set_nofb() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 536
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 value unit_byte
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_crtc_mode_set_nofb() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 532
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 value unit_byte
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_crtc_mode_set_nofb() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 540
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 value unit_byte
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_crtc_mode_set_nofb() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 528
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 value unit_byte
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_crtc_mode_set_nofb() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 544
PARAM_VALUE 2 value 12-15
FUZZY_MAX 2 value 12
BIT_INFO 2 value 0xc,0xf
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_plane_atomic_update() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 1 reg 260
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 0 hdlcd unit_byte
HALF_LOCKED2 &vkms_output->lock
HALF_LOCKED2 irq

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_plane_atomic_update() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 268
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 0 hdlcd unit_byte
HALF_LOCKED2 &vkms_output->lock
HALF_LOCKED2 irq

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_plane_atomic_update() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 264
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 0 hdlcd unit_byte
HALF_LOCKED2 &vkms_output->lock
HALF_LOCKED2 irq

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_plane_atomic_update() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 256
DATA_SOURCE 2 value r drm_fb_dma_get_gem_addr
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 0 hdlcd unit_byte
HALF_LOCKED2 &vkms_output->lock
HALF_LOCKED2 irq

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_set_pxl_fmt() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 576
PARAM_VALUE 2 value 0,8-248,4294967288
BIT_INFO 2 value 0x0,0xfffffff8
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_set_pxl_fmt() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 580
PARAM_VALUE 2 value 0-16777215
BIT_INFO 2 value 0xff0000,0xff0fff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_set_pxl_fmt() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 584
PARAM_VALUE 2 value 0-4095
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/arm/hdlcd_crtc.c hdlcd_set_pxl_fmt() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 588
PARAM_VALUE 2 value 0-4095
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/arm/hdlcd_drv.c hdlcd_drm_bind() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 560
PARAM_VALUE 2 value 0
DATA_SOURCE 0 hdlcd r __devm_drm_dev_alloc
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 global &component_mutex

drivers/gpu/drm/arm/hdlcd_drv.c hdlcd_irq() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 20
DATA_SOURCE 0 hdlcd $1
DATA_SOURCE 2 value r hdlcd_read
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 value 0-u32max
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 flags

drivers/gpu/drm/arm/hdlcd_drv.c hdlcd_irq_install() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 0 hdlcd->mmio 4096-ptr_max
PARAM_VALUE 1 reg 24
PARAM_VALUE 2 value 0
BUF_SIZE 0 hdlcd->clk (-1),1-s32max
DATA_SOURCE 0 hdlcd $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 global &component_mutex

drivers/gpu/drm/arm/hdlcd_drv.c hdlcd_irq_install() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 0 hdlcd->mmio 4096-ptr_max
PARAM_VALUE 1 reg 20
PARAM_VALUE 2 value u32max
BUF_SIZE 0 hdlcd->clk (-1),1-s32max
DATA_SOURCE 0 hdlcd $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 global &component_mutex

drivers/gpu/drm/arm/hdlcd_drv.c hdlcd_irq_install() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 0 hdlcd->mmio 4096-ptr_max
PARAM_VALUE 1 reg 24
PARAM_VALUE 2 value 11
BUF_SIZE 0 hdlcd->clk (-1),1-s32max
DATA_SOURCE 0 hdlcd $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 global &component_mutex

drivers/gpu/drm/arm/hdlcd_drv.c hdlcd_irq_uninstall() -> hdlcd_write()

Type Parameter Key Value
PARAM_VALUE 0 hdlcd 4096-ptr_max
PARAM_VALUE 1 reg 24
PARAM_VALUE 2 value 0
DATA_SOURCE 0 hdlcd $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 0 hdlcd unit_byte
LOCK2 global &component_mutex