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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/si_dma.c si_dma_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/vcn_sw_ring.c vcn_dec_sw_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uvd_v6_0_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c sdma_v2_4_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c jpeg_v2_0_dec_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dqm->lock_hidden

19f4aff6129bc862 gfx_v9_0_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c gfx_v9_4_3_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c sdma_v4_0_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

2424e8ec9bf51854 gfx_v12_0_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_v1_0_dec_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c vcn_v1_0_enc_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dqm->lock_hidden

28ad57647bf6154f gfx_v11_0_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_dec_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c vcn_v2_0_enc_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c gfx_v6_0_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c vcn_v4_0_3_enc_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c sdma_v7_0_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

3d756af95eb3bd31 gfx_v12_1_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c sdma_v3_0_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c sdma_v7_1_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c jpeg_v1_0_decode_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c vpe_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/cik_sdma.c cik_sdma_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c sdma_v4_4_2_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/vce_v4_0.c vce_v4_0_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c gfx_v8_0_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c gfx_v10_0_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c jpeg_v4_0_3_dec_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c gfx_v7_0_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c uvd_v7_0_enc_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c uvd_v7_0_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dqm->lock_hidden

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c sdma_v5_0_ring_emit_vm_flush() -> (struct amdgpu_gmc_funcs)->emit_flush_gpu_tlb()

Type Parameter Key Value
PARAM_VALUE 0 ring 4096-ptr_max
PARAM_VALUE 0 ring->adev 4096-ptr_max
PARAM_VALUE 0 ring->funcs 4096-ptr_max
PARAM_VALUE 0 ring->sched.ready 1
BUF_SIZE 0 ring (-1),1360,87040
BUF_SIZE 0 ring (-1),1360,87040
DATA_SOURCE 0 ring $0
DATA_SOURCE 1 vmid $1
DATA_SOURCE 2 pd_addr $2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dqm->lock_hidden