Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c allocate_doorbell() -> get_num_all_sdma_engines()

Type Parameter Key Value
PARAM_VALUE 0 dqm 4096-ptr_max
PARAM_VALUE 0 dqm->dev 4096-ptr_max
PARAM_VALUE 0 dqm->dev->adev 4096-ptr_max
PARAM_VALUE 0 dqm->dev->kfd 4096-ptr_max
LOCK2 &p->mutex
HALF_LOCKED2 &dqm->lock_hidden
TYPE_LOCK (struct kfd_process)->mutex

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c allocate_hiq_sdma_mqd() -> get_num_all_sdma_engines()

Type Parameter Key Value
PARAM_VALUE 0 dqm 4096-ptr_max
PARAM_VALUE 0 dqm->dev 4096-ptr_max
PARAM_VALUE 0 dqm->dev->adev 4096-ptr_max
PARAM_VALUE 0 dqm->dev->kfd 4096-ptr_max
BUF_SIZE 0 dqm 944
DATA_SOURCE 0 dqm $0
BIT_INFO 0 dqm->ops.create_queue 0x7000aa1060dc8000,0xffffffffffffffff
BIT_INFO 0 dqm->ops.destroy_queue 0x940032a050a8000,0xffffffffffffffff
BIT_INFO 0 dqm->ops.evict_process_queues 0x8c240000a20b000,0xffffffffffffffff
BIT_INFO 0 dqm->ops.initialize 0x2500914460450000,0xffffffffffffffff
BIT_INFO 0 dqm->ops.process_termination 0x18820dc228580000,0xffffffffffffffff
BIT_INFO 0 dqm->ops.restore_process_queues 0x4d00204083108000,0xffffffffffffffff
BIT_INFO 0 dqm->ops.start 0x5700a220208e000,0xffffffffffffffff
BIT_INFO 0 dqm->ops.stop 0x3810801400000,0xffffffffffffffff
BIT_INFO 0 dqm->sched_policy 0x0,0x7fffffff
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &xcp_mgr->xcp_lock

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c reset_hung_queues_sdma() -> get_num_all_sdma_engines()

Type Parameter Key Value
PARAM_VALUE 0 dqm 4096-ptr_max
PARAM_VALUE 0 dqm->dev 4096-ptr_max
PARAM_VALUE 0 dqm->dev->adev 4096-ptr_max
PARAM_VALUE 0 dqm->dev->kfd 4096-ptr_max
BUF_SIZE 0 dqm (-1),944
BUF_SIZE 0 dqm (-1),944
CAPPED_DATA 0 dqm->dev 1
DATA_SOURCE 0 dqm $0
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 dqm->packet_mgr.dqm->wait_times 0-u32max
HOST_DATA 0 dqm->wait_times 0-u32max
LOCK2 0 &dqm->lock_hidden
HALF_LOCKED2 &dqm->dev->adev->reset_domain->sem
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &target->mutex
TYPE_LOCK (struct amdgpu_reset_domain)->sem
TYPE_LOCK (struct device_queue_manager)->lock_hidden

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c reset_hung_queues_sdma() -> get_num_all_sdma_engines()

Type Parameter Key Value
PARAM_VALUE 0 dqm 4096-ptr_max
PARAM_VALUE 0 dqm->dev 4096-ptr_max
PARAM_VALUE 0 dqm->dev->adev 4096-ptr_max
PARAM_VALUE 0 dqm->dev->kfd 4096-ptr_max
BUF_SIZE 0 dqm (-1),944
BUF_SIZE 0 dqm (-1),944
CAPPED_DATA 0 dqm->dev 1
DATA_SOURCE 0 dqm $0
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 dqm->packet_mgr.dqm->wait_times 0-u32max
HOST_DATA 0 dqm->wait_times 0-u32max
LOCK2 0 &dqm->lock_hidden
HALF_LOCKED2 &dqm->dev->adev->reset_domain->sem
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &target->mutex
TYPE_LOCK (struct amdgpu_reset_domain)->sem
TYPE_LOCK (struct device_queue_manager)->lock_hidden

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c sdma_has_hang() -> get_num_all_sdma_engines()

Type Parameter Key Value
PARAM_VALUE 0 dqm 4096-ptr_max
PARAM_VALUE 0 dqm->dev 4096-ptr_max
PARAM_VALUE 0 dqm->dev->adev 4096-ptr_max
BUF_SIZE 0 dqm (-1),944
BUF_SIZE 0 dqm (-1),944
CAPPED_DATA 0 dqm->dev 1
DATA_SOURCE 0 dqm $0
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 dqm->packet_mgr.dqm->wait_times 0-u32max
HOST_DATA 0 dqm->wait_times 0-u32max
LOCK2 0 &dqm->lock_hidden
HALF_LOCKED2 &dqm->dev->adev->reset_domain->sem
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &target->mutex
TYPE_LOCK (struct amdgpu_reset_domain)->sem
TYPE_LOCK (struct device_queue_manager)->lock_hidden

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c sdma_has_hang() -> get_num_all_sdma_engines()

Type Parameter Key Value
PARAM_VALUE 0 dqm 4096-ptr_max
PARAM_VALUE 0 dqm->dev 4096-ptr_max
PARAM_VALUE 0 dqm->dev->adev 4096-ptr_max
PARAM_VALUE 0 dqm->dev->kfd 4096-ptr_max
BUF_SIZE 0 dqm (-1),944
BUF_SIZE 0 dqm (-1),944
CAPPED_DATA 0 dqm->dev 1
DATA_SOURCE 0 dqm $0
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 dqm->packet_mgr.dqm->wait_times 0-u32max
HOST_DATA 0 dqm->wait_times 0-u32max
LOCK2 0 &dqm->lock_hidden
HALF_LOCKED2 &dqm->dev->adev->reset_domain->sem
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &target->mutex
TYPE_LOCK (struct amdgpu_reset_domain)->sem
TYPE_LOCK (struct device_queue_manager)->lock_hidden