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Documented in 1 files:

Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/radeon/evergreen_cs.c evergreen_packet3_check() -> evergreen_is_safe_reg()

Type Parameter Key Value
PARAM_VALUE 0 p 2688560332286525440
PARAM_VALUE 0 p->track 4096-ptr_max
PARAM_VALUE 1 reg 32768,32772-44031
BUF_SIZE 0 p->filp s32min-(-2),1-s32max
BUF_SIZE 0 p->rdev s32min-(-2),1-s32max
BUF_SIZE 0 p->track (-1),848
CAPPED_DATA 1 reg 1
DATA_SOURCE 0 p $0
FUZZY_MAX 1 reg 44031
HARD_MAX 1 reg 44031
USER_DATA 0 p->idx 6-213005[c]
USER_DATA 0 p->nchunks 1-268435455[c][u]
USER_DATA 0 *p->ib.ptr 0-u32max
USER_DATA 1 reg 32768,32772[c]
NO_OVERFLOW_SIMPLE 0 p->nrelocs
USER_PTR 0 p->chunks_array
USER_PTR 0 p->ib.ptr
LOCK2 &rdev->exclusive_lock
TYPE_LOCK (struct radeon_device)->exclusive_lock

drivers/gpu/drm/radeon/evergreen_cs.c evergreen_packet3_check() -> evergreen_is_safe_reg()

Type Parameter Key Value
PARAM_VALUE 0 p 2688560332286525440
PARAM_VALUE 0 p->track 4096-ptr_max
PARAM_VALUE 1 reg 163840,163844-167935
BUF_SIZE 0 p->filp s32min-(-2),1-s32max
BUF_SIZE 0 p->rdev s32min-(-2),1-s32max
BUF_SIZE 0 p->track (-1),848
CAPPED_DATA 1 reg 1
DATA_SOURCE 0 p $0
FUZZY_MAX 1 reg 167935
HARD_MAX 1 reg 167935
USER_DATA 0 p->idx 6-213005[c]
USER_DATA 0 p->nchunks 1-268435455[c][u]
USER_DATA 0 *p->ib.ptr 0-u32max
USER_DATA 1 reg 163840,163844[c]
NO_OVERFLOW_SIMPLE 0 p->nrelocs
USER_PTR 0 p->chunks_array
USER_PTR 0 p->ib.ptr
LOCK2 &rdev->exclusive_lock
TYPE_LOCK (struct radeon_device)->exclusive_lock

drivers/gpu/drm/radeon/evergreen_cs.c evergreen_packet3_check() -> evergreen_is_safe_reg()

Type Parameter Key Value
PARAM_VALUE 0 p 2688560332286525440
PARAM_VALUE 0 p->track 4096-ptr_max
PARAM_VALUE 1 reg 0,4-4294967292
BUF_SIZE 0 p->filp s32min-(-2),1-s32max
BUF_SIZE 0 p->rdev s32min-(-2),1-s32max
BUF_SIZE 0 p->track (-1),848
DATA_SOURCE 0 p $0
BIT_INFO 1 reg 0x0,0xfffffffc
USER_DATA 0 p->idx 6-213005[c]
USER_DATA 0 p->nchunks 1-268435455[c][u]
USER_DATA 0 *p->ib.ptr 0-u32max
USER_DATA 1 reg 0,4-4294967292[c]
NO_OVERFLOW_SIMPLE 0 p->nrelocs
USER_PTR 0 p->chunks_array
USER_PTR 0 p->ib.ptr
LOCK2 &rdev->exclusive_lock
TYPE_LOCK (struct radeon_device)->exclusive_lock

drivers/gpu/drm/radeon/evergreen_cs.c evergreen_packet3_check() -> evergreen_is_safe_reg()

Type Parameter Key Value
PARAM_VALUE 0 p 2688560332286525440
PARAM_VALUE 0 p->track 4096-ptr_max
PARAM_VALUE 1 reg 0,4-4294967292
BUF_SIZE 0 p->filp s32min-(-2),1-s32max
BUF_SIZE 0 p->rdev s32min-(-2),1-s32max
BUF_SIZE 0 p->track (-1),848
CAPPED_DATA 0 p->chunk_ib->length_dw 1
DATA_SOURCE 0 p $0
BIT_INFO 1 reg 0x0,0xfffffffc
USER_DATA 0 p->idx 6-213005[c]
USER_DATA 0 p->nchunks 1-268435455[c][u]
USER_DATA 0 *p->ib.ptr 0-u32max
USER_DATA 1 reg 0,4-4294967292[c]
NO_OVERFLOW_SIMPLE 0 p->nrelocs
USER_PTR 0 p->chunks_array
USER_PTR 0 p->ib.ptr
LOCK2 &rdev->exclusive_lock
TYPE_LOCK (struct radeon_device)->exclusive_lock

drivers/gpu/drm/radeon/evergreen_cs.c evergreen_packet3_check() -> evergreen_is_safe_reg()

Type Parameter Key Value
PARAM_VALUE 0 p 2688560332286525440
PARAM_VALUE 0 p->track 4096-ptr_max
PARAM_VALUE 1 reg 0,4-4294967292
BUF_SIZE 0 p->filp s32min-(-2),1-s32max
BUF_SIZE 0 p->rdev s32min-(-2),1-s32max
BUF_SIZE 0 p->track (-1),848
DATA_SOURCE 0 p $0
BIT_INFO 1 reg 0x0,0xfffffffc
USER_DATA 0 p->idx 6-213005[c]
USER_DATA 0 p->nchunks 1-268435455[c][u]
USER_DATA 0 *p->ib.ptr 0-u32max
USER_DATA 1 reg 0,4-4294967292[c]
NO_OVERFLOW_SIMPLE 0 p->nrelocs
USER_PTR 0 p->chunks_array
USER_PTR 0 p->ib.ptr
LOCK2 &rdev->exclusive_lock
TYPE_LOCK (struct radeon_device)->exclusive_lock

drivers/gpu/drm/radeon/evergreen_cs.c evergreen_packet3_check() -> evergreen_is_safe_reg()

Type Parameter Key Value
PARAM_VALUE 0 p 2688560332286525440
PARAM_VALUE 0 p->track 4096-ptr_max
PARAM_VALUE 1 reg 0,4-4294967292
BUF_SIZE 0 p->filp s32min-(-2),1-s32max
BUF_SIZE 0 p->rdev s32min-(-2),1-s32max
BUF_SIZE 0 p->track (-1),848
CAPPED_DATA 0 p->chunk_ib->length_dw 1
DATA_SOURCE 0 p $0
BIT_INFO 1 reg 0x0,0xfffffffc
USER_DATA 0 p->idx 6-213005[c]
USER_DATA 0 p->nchunks 1-268435455[c][u]
USER_DATA 0 *p->ib.ptr 0-u32max
USER_DATA 1 reg 0,4-4294967292[c]
NO_OVERFLOW_SIMPLE 0 p->nrelocs
USER_PTR 0 p->chunks_array
USER_PTR 0 p->ib.ptr
LOCK2 &rdev->exclusive_lock
TYPE_LOCK (struct radeon_device)->exclusive_lock