| PARAM_VALUE |
0 |
dev |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev->dev_attr.max_cq_depth |
1-u32max |
| PARAM_VALUE |
0 |
dev->edev->aq->comp_ctx_pool |
0-u16max |
| PARAM_VALUE |
0 |
dev->edev.aq.avail_cmds.first_waiter->up |
1 |
| PARAM_VALUE |
0 |
dev->edev.aq.avail_cmds.last_holder |
0 |
| PARAM_VALUE |
0 |
dev->edev.aq.avail_cmds.lock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
dev->edev.aq.avail_cmds.lock.owner |
(-1) |
| PARAM_VALUE |
0 |
dev->edev.aq.avail_cmds.lock.owner_cpu |
u32max |
| PARAM_VALUE |
0 |
dev->edev.aq.comp_ctx_lock.rlock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
dev->edev.aq.comp_ctx_pool |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev->edev.aq.cq.phase |
1-255 |
| PARAM_VALUE |
0 |
dev->edev.aq.sq.phase |
0-1 |
| PARAM_VALUE |
0 |
dev->pdev->dev.dma_io_tlb_lock.rlock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
dev->pdev->dev.dma_io_tlb_pools.next |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev->pdev->dev.dma_io_tlb_pools.next->prev |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev->pdev->dev.dma_io_tlb_pools.next->prev->prev |
4096-ptr_max |
| PARAM_VALUE |
0 |
dev->pdev->dev.dma_uses_io_tlb |
1 |
| PARAM_VALUE |
0 |
dev->pdev->dev.iommu->pci_32bit_workaround |
0-1 |
| PARAM_VALUE |
1 |
cq_idx |
0 |
| CAPPED_DATA |
0 |
dev->dev_attr.sub_cqs_per_cq |
1 |
| DATA_SOURCE |
0 |
dev |
r to_edev |
| NOCHECK_CALL |
|
|
|