| PARAM_VALUE |
0 |
rtwdev |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->bb_table |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->bss_clr_vld.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->bss_clr_vld.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,16383,31744,s16max-32768,65280,u16max,131072,258048,261632,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680,25165824,117440512-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->c2h_counter_reg.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->c2h_counter_reg.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,16383,31744,s16max-32768,65280,u16max,131072,258048,261632,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680,25165824,117440512-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->c2h_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->chip_gen |
0-1 |
| PARAM_VALUE |
0 |
rtwdev->chip->dcfo_comp |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->dcfo_comp->addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dcfo_comp->mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,16383,31744,s16max-32768,65280,u16max,131072,258048,261632,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680,25165824,117440512-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dflt_parms |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_lna_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_lna_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,16383,31744,s16max-32768,65280,u16max,131072,258048,261632,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680,25165824,117440512-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,16383,31744,s16max-32768,65280,u16max,131072,258048,261632,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680,25165824,117440512-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_rxb_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_rxb_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,16383,31744,s16max-32768,65280,u16max,131072,258048,261632,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680,25165824,117440512-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,16383,31744,s16max-32768,65280,u16max,131072,258048,261632,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680,25165824,117440512-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_tia_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_tia_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,16383,31744,s16max-32768,65280,u16max,131072,258048,261632,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680,25165824,117440512-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_lna_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_lna_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,16383,31744,s16max-32768,65280,u16max,131072,258048,261632,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680,25165824,117440512-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,16383,31744,s16max-32768,65280,u16max,131072,258048,261632,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680,25165824,117440512-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_rxb_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_rxb_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,16383,31744,s16max-32768,65280,u16max,131072,258048,261632,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680,25165824,117440512-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,16383,31744,s16max-32768,65280,u16max,131072,258048,261632,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680,25165824,117440512-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_tia_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_tia_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,16383,31744,s16max-32768,65280,u16max,131072,258048,261632,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680,25165824,117440512-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_table |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->edcca_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->h2c_counter_reg.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->h2c_counter_reg.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,16383,31744,s16max-32768,65280,u16max,131072,258048,261632,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680,25165824,117440512-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->h2c_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->imr_info |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def |
308444759750025216,8356547646888521728 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->agg_limit.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->agg_limit.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->bfee_ctrl.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->bfee_ctrl.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->check_mac_en |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->muedca_ctrl.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->muedca_ctrl.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->narrow_bw_ru_dis.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->narrow_bw_ru_dis.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->ra_agg_limit.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->ra_agg_limit.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->txcnt_limit.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->txcnt_limit.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->wow_ctrl.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->wow_ctrl.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mon_reg |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->nctl_table |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->nhm_report |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->nhm_th |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->page_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->phy_def |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->phy_def->bb_wrap |
0,3217351208659951616,4627955618887114752 |
| PARAM_VALUE |
0 |
rtwdev->chip->phy_def->cfo |
5861233052031426560,6891872918701789184,7850919170797744128 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->ampdu_miss.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->brk.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->brk_option.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cca_spoofing.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_brk.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_cca.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_sfd_gg.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_sig_gg.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_spoofing.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_txen.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_txon.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->enable_all_cnt.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->lsig_brk_l_th.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->lsig_brk_s_th.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->ofdm_cca.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->r1b_rr_sel.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rst_all_cnt.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rxl_err_parity.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rxl_err_rate.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->search_fail.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pwr_off_seq->addr |
2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE |
0 |
rtwdev->chip->pwr_on_seq |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->pwr_on_seq->addr |
2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_get.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_get.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,16383,31744,s16max-32768,65280,u16max,131072,258048,261632,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680,25165824,117440512-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_init->mode.mask |
1-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_init->pinmux.mask |
1-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE |
0 |
rtwdev->chip->rrsr_cfgs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->rrsr_cfgs->ref_rate.mask |
1-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE |
0 |
rtwdev->chip->rrsr_cfgs->rsc.mask |
1-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE |
0 |
rtwdev->chip->xtal_info |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->dev |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->dev->bus |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->dev->class |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->dev->driver |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->flags |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->deinit |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->read16 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->read32 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->start |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->stop |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->write16 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->write32 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->write8 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->do_mdelay |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->do_udelay |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->pack |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->phy_write32 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->unpack |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->write16 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->write32 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->write8 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->write_rf |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->pci_info->dma_busy1.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->pci_info->dma_io_stop.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->pci_info->dma_stop1.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->pci_info->dma_stop2.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->pci_info->recognize_intrs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->priv |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->priv->continual_io_error.counter |
s32min-s32max |
| PARAM_VALUE |
0 |
rtwdev->rfk_mcc.data->table_idx |
0-2 |
| DATA_SOURCE |
0 |
rtwdev |
$0 |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| NOCHECK_CALL |
|
|
|
| HALF_LOCKED2 |
|
_T->lock |
|