Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_mipi_init() -> dsi_set_mipi_phy()

Type Parameter Key Value
PARAM_VALUE 1 phy 4096-ptr_max
PARAM_VALUE 1 phy->clk_division 0,10-899526
PARAM_VALUE 1 phy->clk_t_hs_prepare 0-133,u32max
PARAM_VALUE 1 phy->clk_t_hs_zero 0-263
PARAM_VALUE 1 phy->clk_t_lpx 0-51
PARAM_VALUE 1 phy->clk_t_wakeup 0,255
PARAM_VALUE 1 phy->clk_to_data_delay 0,13-421
PARAM_VALUE 1 phy->clkhs2lp_time 0-15106
PARAM_VALUE 1 phy->clklp2hs_time 0,12-420
PARAM_VALUE 1 phy->data_t_hs_prepare 0-12625,u32max
PARAM_VALUE 1 phy->data_t_hs_zero 0-7606
PARAM_VALUE 1 phy->data_t_lpx 0-51
PARAM_VALUE 1 phy->data_t_ta_get 0,4
PARAM_VALUE 1 phy->data_t_ta_go 0,3
PARAM_VALUE 1 phy->data_t_wakeup 0,255
PARAM_VALUE 1 phy->data_to_clk_delay 0-80167
PARAM_VALUE 1 phy->hs2lp_time 0-15106
PARAM_VALUE 1 phy->hstx_ckg_sel 0,4-7
PARAM_VALUE 1 phy->lane_byte_clk_kHz 0,100-8995257
PARAM_VALUE 1 phy->lp2hs_time 0-15242
PARAM_VALUE 1 phy->pll_enbwt 0-1
PARAM_VALUE 1 phy->pll_fbd_2p 0
PARAM_VALUE 1 phy->pll_fbd_div1f 0-1
PARAM_VALUE 1 phy->pll_fbd_div5f 0-1
PARAM_VALUE 1 phy->pll_fbd_p 0,2-3
PARAM_VALUE 1 phy->pll_fbd_s 0-3
PARAM_VALUE 1 phy->pll_lpf_cs 0
PARAM_VALUE 1 phy->pll_lpf_rs 0
PARAM_VALUE 1 phy->pll_pre_div1p 0-1
PARAM_VALUE 1 phy->pll_pre_p 0-1873,u32max
BUF_SIZE 1 phy 128
MEM_ZERO 1 phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex