Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 16
PARAM_VALUE 2 val 0-51
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 17
PARAM_VALUE 2 val 0-133,u32max
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 18
PARAM_VALUE 2 val 0-263
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 19
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 20
PARAM_VALUE 2 val 0,255
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 32
PARAM_VALUE 2 val 0-51
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 33
PARAM_VALUE 2 val 0-12625,u32max
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 34
PARAM_VALUE 2 val 0-7606
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 35
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 36
PARAM_VALUE 2 val 0,3
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 37
PARAM_VALUE 2 val 0,4
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 38
PARAM_VALUE 2 val 0,255
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 96
PARAM_VALUE 2 val 0,4-7
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 99
PARAM_VALUE 2 val 0-1,16-17,32-33,48-49
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 100
PARAM_VALUE 2 val 0,2-3
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 101
PARAM_VALUE 2 val 0-3
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 102
PARAM_VALUE 2 val 0-1064,u32max
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c dsi_set_mipi_phy() -> dsi_phy_tst_set()

Type Parameter Key Value
PARAM_VALUE 1 reg 103
PARAM_VALUE 2 val 160
DATA_SOURCE 0 base $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex