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Documented in 1 files:

Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 26 files:

Smatch caller information:

drivers/gpu/drm/nouveau/nouveau_dp.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.raw_lock.val.counter 0-s32max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 1 offset 257,1536
PARAM_VALUE 2 *buffer 0-254
PARAM_VALUE 3 size 1
BUF_SIZE 0 aux 2992
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
HARD_MAX 1 offset 1536
RX_PATH
TASK_NOT_RUNNING
LOCK2 &outp->dp.hpd_irq_lock
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct nouveau_encoder)->dp.hpd_irq_lock

drivers/gpu/drm/msm/dp/dp_ctrl.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1

drivers/gpu/drm/msm/dp/dp_ctrl.c msm_dp_ctrl_config_psr() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 1 offset 368
PARAM_VALUE 2 buffer 7495246859722883072
PARAM_VALUE 2 *buffer 1
PARAM_VALUE 3 size 1
BUF_SIZE 2 buffer 4
NOCHECK_CALL

drivers/gpu/drm/msm/dp/dp_ctrl.c msm_dp_ctrl_link_train() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.raw_lock.val.counter 0-s32max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 1 offset 263
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 2 buffer 2
NOCHECK_CALL

drivers/gpu/drm/msm/dp/dp_ctrl.c msm_dp_ctrl_link_train() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.raw_lock.val.counter s32min-s32max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 1 offset 266
PARAM_VALUE 2 buffer 4872970620496900096
PARAM_VALUE 2 *buffer 1
PARAM_VALUE 3 size 1
NOCHECK_CALL

drivers/gpu/drm/msm/dp/dp_ctrl.c msm_dp_ctrl_update_phy_vx_px() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux->hw_mutex->first_waiter->task->blocked_lock.owner (-4611686018427387904)-4611686018427387903
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 0-2097151
BUF_SIZE 2 buffer 4
CAPPED_DATA 3 size 1

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_mst_types.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 513,8195
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
RX_PATH
TASK_NOT_RUNNING
LOCK2 &aconnector->handle_mst_msg_ready
TYPE_LOCK (struct amdgpu_dm_connector)->handle_mst_msg_ready

drivers/gpu/drm/radeon/atombios_dp.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 256-258,263,266,1536
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
BUF_SIZE 0 aux (-1),2992
BUF_SIZE 0 aux (-1),2992
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
HARD_MAX 1 offset 1536
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/radeon/atombios_dp.c radeon_dp_update_vs_emph() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter 0,4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.raw_lock.val.counter s32min-s32max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 259
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 0-s32max,18446744071562067968-u64max
BUF_SIZE 2 buffer 4
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 836
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &display->backlight.lock

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c intel_dp_aux_hdr_set_aux_backlight() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 852
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 4
BUF_SIZE 2 buffer 4
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte
HALF_LOCKED2 &display->backlight.lock

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c intel_dp_aux_write_content_luminance() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 838
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 4
BUF_SIZE 2 buffer 4
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte
HALF_LOCKED2 &display->backlight.lock

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c intel_dp_aux_write_panel_luminance_override() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 842
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 4
BUF_SIZE 2 buffer 4
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte
HALF_LOCKED2 &display->backlight.lock

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->drm_dev 0,4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex->first_waiter->task->blocked_lock.owner (-4611686018427387904)-4611686018427387903
PARAM_VALUE 0 aux->hw_mutex.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter 0,4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 273
PARAM_VALUE 2 *buffer 7
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
RX_PATH
TASK_NOT_RUNNING
LOCK2 &mgr->lock
LOCK2 _T->lock
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &of->mutex
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 global &drm_unplug_srcu
TYPE_LOCK (struct drm_dp_mst_topology_mgr)->lock

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c resume_mst_branch_status() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->drm_dev 0,4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex->first_waiter->task->blocked_lock.owner (-4611686018427387904)-4611686018427387903
PARAM_VALUE 0 aux->hw_mutex.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.raw_lock.val.counter s32min-s32max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 1 offset 48
PARAM_VALUE 2 buffer 4363954008226488320
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 16
BUF_SIZE 2 buffer 16
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte
LOCK2 &mgr->lock
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &of->mutex
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 global &drm_unplug_srcu
TYPE_LOCK (struct drm_dp_mst_topology_mgr)->lock

drivers/gpu/drm/display/drm_dp_cec.c drm_dp_dpcd_write_data() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 1 offset 8196,12289,12291-12292,12302,12320
BUF_SIZE 0 aux (-1),48,80,88,112,144,168,176,184,192,272,1216,1608,1784,2288,2432,3320,3552,6568
BUF_SIZE 0 aux (-1),48,80,88,112,144,168,176,184,192,272,1216,1608,1784,2288,2432,3320,3552,6568
BUF_SIZE 2 buffer (-1),2,16
BUF_SIZE 2 buffer (-1),2,16
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
DATA_SOURCE 2 buffer $2
DATA_SOURCE 3 size $3
HARD_MAX 1 offset 12320
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte
HALF_LOCKED2 &adap->lock
HALF_LOCKED2 0 &aux->cec.lock

drivers/gpu/drm/i915/display/intel_lspcon.c _lspcon_parade_write_infoframe_blocks() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 1302
PARAM_VALUE 3 size 8
DATA_SOURCE 0 aux $0
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_lspcon.c _lspcon_parade_write_infoframe_blocks() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 1310
PARAM_VALUE 2 buffer 1964695121438838784
PARAM_VALUE 2 *buffer 128-131
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_lspcon.c _lspcon_write_avi_infoframe_mca() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 1472-u16max
PARAM_VALUE 2 buffer 4096-u64max
PARAM_VALUE 3 size 1
BUF_SIZE 2 buffer (-1),32
BUF_SIZE 2 buffer (-1),32
DATA_SOURCE 0 aux $0
FUZZY_MAX 1 offset 1472
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_lspcon.c _lspcon_write_avi_infoframe_mca() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 1503
PARAM_VALUE 2 buffer 8624532816369917952
PARAM_VALUE 3 size 1
BUF_SIZE 2 buffer 4
DATA_SOURCE 0 aux $0
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/xlnx/zynqmp_dp.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 256-258,263-264,1536
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
HARD_MAX 1 offset 1536
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 2 *buffer
HALF_LOCKED2 &dp->lock
HALF_LOCKED2 _T->lock

drivers/gpu/drm/xlnx/zynqmp_dp.c zynqmp_dp_set_test_pattern() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 267
PARAM_VALUE 2 buffer 4153641123988660224
PARAM_VALUE 3 size 2
BUF_SIZE 2 buffer 2
HALF_LOCKED2 &attr->mutex
HALF_LOCKED2 &dp->lock
HALF_LOCKED2 _T->lock

drivers/gpu/drm/xlnx/zynqmp_dp.c zynqmp_dp_update_vs_emph() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 259
BUF_SIZE 2 buffer 2
DATA_SOURCE 2 buffer $1
RX_PATH
TASK_NOT_RUNNING
LOCK2 _T->lock
HALF_LOCKED2 &attr->mutex

drivers/gpu/drm/display/drm_dp_tunnel.c drm_dp_dpcd_write_data() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 1 offset 917541,917552-917553
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
DATA_SOURCE 2 buffer $2
DATA_SOURCE 3 size $3
HARD_MAX 1 offset 917553
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/bridge/tc358767.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 258,266
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
BUF_SIZE 0 aux 2992
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
HARD_MAX 1 offset 266
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &first_bridge->encoder->bridge_chain_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/bridge/tc358767.c tc_main_link_enable() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.first_waiter 0,4096-ptr_max
PARAM_VALUE 1 offset 256
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 0 aux 2992
BUF_SIZE 2 buffer 6
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &first_bridge->encoder->bridge_chain_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/bridge/tc358767.c tc_main_link_enable() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 263
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 0 aux 2992
BUF_SIZE 2 buffer 6
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &first_bridge->encoder->bridge_chain_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/bridge/tc358767.c tc_main_link_enable() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 259
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 0 aux 2992
BUF_SIZE 2 buffer 6
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &first_bridge->encoder->bridge_chain_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/i915/display/intel_dp.c drm_dp_dpcd_write_data() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 513,8197
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
DATA_SOURCE 2 buffer $2
DATA_SOURCE 3 size $3
HARD_MAX 1 offset 8197
LOCK2 &pool->lock

drivers/gpu/drm/i915/display/intel_dp.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 352,1536,12368-12369,12378
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
CAPPED_DATA 0 aux 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
HARD_MAX 1 offset 12378
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pool->lock

drivers/gpu/drm/i915/display/intel_dp.c intel_dp_ack_sink_irq_esi() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 8195
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 3
BUF_SIZE 2 buffer 3
HALF_LOCKED2 &pool->lock

drivers/gpu/drm/i915/display/intel_dp.c intel_dp_init_source_oui() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 768
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 3
BUF_SIZE 2 buffer 3
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte

drivers/gpu/drm/display/drm_dp_mst_topology.c drm_dp_dpcd_write_data() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 3 size 0-16,18446744071562067968-u64max
BUF_SIZE 0 aux (-1),2992
BUF_SIZE 0 aux (-1),2992
BUF_SIZE 2 buffer (-1),16
BUF_SIZE 2 buffer (-1),16
CAPPED_DATA 3 size 1
CAPPED_DATA 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
DATA_SOURCE 2 buffer $2
DATA_SOURCE 3 size $3
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte
HALF_LOCKED2 &mgr->lock
HALF_LOCKED2 &mgr->qlock

drivers/gpu/drm/bridge/analogix/analogix-anx6345.c anx6345_dp_link_training() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 256
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 2 buffer 2
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte
HALF_LOCKED2 &commit->dev->mode_config.connection_mutex
HALF_LOCKED2 &commit->dev->mode_config.connection_mutex.mutex
HALF_LOCKED2 &first_bridge->encoder->bridge_chain_mutex

drivers/gpu/drm/bridge/analogix/analogix-anx6345.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 263
PARAM_VALUE 2 *buffer 0,16
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &commit->dev->mode_config.connection_mutex
HALF_LOCKED2 &commit->dev->mode_config.connection_mutex.mutex
HALF_LOCKED2 &first_bridge->encoder->bridge_chain_mutex

drivers/gpu/drm/bridge/synopsys/dw-dp.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 258
PARAM_VALUE 2 *buffer 0-3,7,32-35,39
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->mode_config.connection_mutex
HALF_LOCKED2 &pool->lock

drivers/gpu/drm/bridge/synopsys/dw-dp.c dw_dp_link_configure() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 256
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 2 buffer 2
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte
HALF_LOCKED2 &dev->mode_config.connection_mutex
HALF_LOCKED2 &pool->lock

drivers/gpu/drm/bridge/synopsys/dw-dp.c dw_dp_link_configure() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 263
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 2 buffer 2
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte
HALF_LOCKED2 &dev->mode_config.connection_mutex
HALF_LOCKED2 &pool->lock

drivers/gpu/drm/bridge/synopsys/dw-dp.c dw_dp_link_train_update_vs_emph() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 259
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 0-s32max
BUF_SIZE 2 buffer 4
CAPPED_DATA 3 size 1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->mode_config.connection_mutex
HALF_LOCKED2 &pool->lock

drivers/gpu/drm/tegra/dp.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.raw_lock.val.counter 0-s32max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 1 offset 258,264,266
PARAM_VALUE 2 *buffer 0-3,32-35
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
HARD_MAX 1 offset 266
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/tegra/dp.c drm_dp_link_apply_training() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 1 offset 259
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 0-31
BUF_SIZE 2 buffer 4
CAPPED_DATA 3 size 1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/tegra/dp.c drm_dp_link_apply_training() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.raw_lock.val.counter s32min-s32max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 1 offset 271
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 0-16
BUF_SIZE 2 buffer 4
CAPPED_DATA 3 size 1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/tegra/dp.c drm_dp_link_configure() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 1 offset 256
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 2 buffer 2
DATA_SOURCE 0 aux $0
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c anx78xx_dp_link_training() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 256
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 2 buffer 2
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte
LOCK2 &anx78xx->lock
HALF_LOCKED2 _T->lock
TYPE_LOCK (struct anx78xx)->lock

drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 263
PARAM_VALUE 2 *buffer 0,16
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
RX_PATH
TASK_NOT_RUNNING
LOCK2 &anx78xx->lock
HALF_LOCKED2 _T->lock
TYPE_LOCK (struct anx78xx)->lock

drivers/gpu/drm/i915/display/intel_alpm.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 278,8203
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
BUF_SIZE 0 aux (-1),2992
BUF_SIZE 0 aux (-1),2992
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
HARD_MAX 1 offset 8203
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &psr->lock

drivers/gpu/drm/i915/display/intel_ddi.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 263,288,640
PARAM_VALUE 2 *buffer 0-1,3
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
HARD_MAX 1 offset 640
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c hibmc_dp_link_set_pattern() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex->first_waiter->task->blocked_lock.owner (-4611686018427387904)-4611686018427387903
PARAM_VALUE 0 aux->hw_mutex.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.raw_lock.val.counter s32min-s32max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 1 offset 258
PARAM_VALUE 2 buffer 7386275336799543296
PARAM_VALUE 2 *buffer 0,33-34
PARAM_VALUE 3 size 1
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c hibmc_dp_link_training_channel_eq() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex->first_waiter->task->blocked_lock.owner (-4611686018427387904)-4611686018427387903
PARAM_VALUE 0 aux->hw_mutex.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter 0,4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.raw_lock.val.counter s32min-s32max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 259
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 0-2
BUF_SIZE 2 buffer 2
CAPPED_DATA 3 size 1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c hibmc_dp_link_training_configure() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex->first_waiter->task->blocked_lock.owner (-4611686018427387904)-4611686018427387903
PARAM_VALUE 1 offset 256
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 2 buffer 2
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c hibmc_dp_link_training_configure() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex->first_waiter->task->blocked_lock.owner (-4611686018427387904)-4611686018427387903
PARAM_VALUE 0 aux->hw_mutex.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter 0,4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.raw_lock.val.counter s32min-s32max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 263
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 2 buffer 2
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c hibmc_dp_link_training_cr() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex->first_waiter->task->blocked_lock.owner (-4611686018427387904)-4611686018427387903
PARAM_VALUE 0 aux->hw_mutex.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter 0,4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.raw_lock.val.counter s32min-s32max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 259
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1-2
BUF_SIZE 2 buffer 2
CAPPED_DATA 3 size 1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c hibmc_dp_link_training_cr_pre() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex->first_waiter->task->blocked_lock.owner (-4611686018427387904)-4611686018427387903
PARAM_VALUE 0 aux->hw_mutex.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter 0,4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.raw_lock.val.counter s32min-s32max
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 259
PARAM_VALUE 3 size 0-2
BUF_SIZE 2 buffer 2
CAPPED_DATA 3 size 1
FUZZY_MAX 3 size 1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/bridge/ite-it6505.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 258-514
PARAM_VALUE 3 size 1
CAPPED_DATA 1 offset 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pool->lock

drivers/gpu/drm/bridge/ite-it6505.c it6505_drm_dp_link_configure() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.first_waiter 0,4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 256
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 0 aux 2992
BUF_SIZE 2 buffer 2
UNITS 3 size unit_byte
HALF_LOCKED2 &pool->lock

drivers/gpu/drm/i915/display/intel_dp_link_training.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 257-258,277,289
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
HARD_MAX 1 offset 289
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_disable_dpcd_training_pattern() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 258,983056-983696
PARAM_VALUE 2 buffer 4498328234937843712
PARAM_VALUE 2 *buffer 0
PARAM_VALUE 3 size 1
DATA_SOURCE 1 offset r intel_dp_training_pattern_set_reg
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_link_training_set_bw() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 256
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 2 buffer 2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 3 size unit_byte

drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_link_training_set_mode() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 263
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 2 buffer 2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_set_link_train() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 258,983056-983696
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 1-256
BUF_SIZE 2 buffer 5
DATA_SOURCE 1 offset r intel_dp_training_pattern_set_reg
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_dp_link_training.c intel_dp_update_link_train() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 259,983057-983697
PARAM_VALUE 2 buffer 0
BUF_SIZE 2 buffer 4
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_dp_hdcp.c intel_dp_hdcp2_write_msg() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 430080-u32max
PARAM_VALUE 2 buffer 4096-u64max
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1-16,9223372036854775808-u64max
BUF_SIZE 0 aux 2992
UNITS 3 size unit_byte
LOCK2 &dig_port->hdcp.mutex
LOCK2 &hdcp->mutex
TYPE_LOCK (struct intel_digital_port)->hdcp.mutex
TYPE_LOCK (struct intel_hdcp)->mutex

drivers/gpu/drm/i915/display/intel_dp_hdcp.c intel_dp_hdcp_write_an_aksv() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 425996
PARAM_VALUE 3 size 8
BUF_SIZE 2 buffer 8
DATA_SOURCE 2 buffer $1
RX_PATH
TASK_NOT_RUNNING
LOCK2 &dig_port->hdcp.mutex
LOCK2 &hdcp->mutex
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct intel_digital_port)->hdcp.mutex
TYPE_LOCK (struct intel_hdcp)->mutex

drivers/gpu/drm/i915/display/intel_dp_hdcp.c intel_dp_hdcp_write_an_aksv() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 425991
PARAM_VALUE 2 buffer 2408450463231549440
PARAM_VALUE 3 size 5
BUF_SIZE 2 buffer 5
RX_PATH
TASK_NOT_RUNNING
LOCK2 &dig_port->hdcp.mutex
LOCK2 &hdcp->mutex
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct intel_digital_port)->hdcp.mutex
TYPE_LOCK (struct intel_hdcp)->mutex

drivers/gpu/drm/i915/display/intel_psr.c _panel_replay_enable_sink() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 432
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 2 buffer 2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 3 size unit_byte
LOCK2 &psr->lock
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct intel_psr)->lock

drivers/gpu/drm/i915/display/intel_psr.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 278,282,368,432,1536,8198-8199
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
HARD_MAX 1 offset 8199
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &intel_dp->psr.lock
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &psr->lock

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c analogix_dp_link_start() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 256
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 2 buffer 4
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c analogix_dp_link_start() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 259
PARAM_VALUE 3 size 0-31
BUF_SIZE 2 buffer 4
CAPPED_DATA 3 size 1
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c analogix_dp_process_clock_recovery() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 259
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1-31
BUF_SIZE 2 buffer 4
CAPPED_DATA 3 size 1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 3 size 1-31[c]

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c analogix_dp_process_equalizer_training() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 259
PARAM_VALUE 2 *buffer 0-67
PARAM_VALUE 3 size 0-31
BUF_SIZE 2 buffer 4
CAPPED_DATA 3 size 1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 3 size 0-31[c]

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 257-258,368,1536
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
HARD_MAX 1 offset 1536
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/amd/amdgpu/atombios_dp.c amdgpu_atombios_dp_update_vs_emph() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.dep_map->name 0-255
PARAM_VALUE 0 aux->hw_mutex.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 1 offset 259
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 0-s32max,18446744071562067968-u64max
BUF_SIZE 2 buffer 4
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/atombios_dp.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 256-258,263,266,1536
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
BUF_SIZE 0 aux (-1),2992
BUF_SIZE 0 aux (-1),2992
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
HARD_MAX 1 offset 1536
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c cdns_mhdp_link_configure() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 256
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 2 buffer 2
DATA_SOURCE 0 aux $0
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte
LOCK2 &mhdp->link_mutex
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct cdns_mhdp_device)->link_mutex

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c cdns_mhdp_link_up() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 263
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 2 buffer 2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &mhdp->link_mutex
TYPE_LOCK (struct cdns_mhdp_device)->link_mutex

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 258
PARAM_VALUE 2 *buffer 0,7,32-35,37-64
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
RX_PATH
TASK_NOT_RUNNING
LOCK2 &mhdp->link_mutex
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct cdns_mhdp_device)->link_mutex

drivers/gpu/drm/bridge/ti-sn65dsi86.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 266
PARAM_VALUE 2 *buffer 1
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &first_bridge->encoder->bridge_chain_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c dm_helpers_dp_write_dpcd() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 2 *buffer 0-255
BUF_SIZE 2 buffer (-1),2
BUF_SIZE 2 buffer (-1),2
DATA_SOURCE 1 offset $2
DATA_SOURCE 2 buffer $3
DATA_SOURCE 3 size $4
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte
HALF_LOCKED2 &aconnector->hpd_lock

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c dm_helpers_dp_write_dsc_enable() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 1-u64max
PARAM_VALUE 1 offset 352
PARAM_VALUE 2 buffer 6978248487097511936
PARAM_VALUE 2 *buffer 2
PARAM_VALUE 3 size 1
RX_PATH

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c dm_helpers_dp_write_dsc_enable() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 1-u64max
PARAM_VALUE 1 offset 352
PARAM_VALUE 2 buffer 4193214314900340736
PARAM_VALUE 2 *buffer 1
PARAM_VALUE 3 size 1
RX_PATH

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c dm_helpers_dp_write_dsc_enable() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 1-u64max
PARAM_VALUE 1 offset 352
PARAM_VALUE 2 buffer 4193214314900340736
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c dm_helpers_dp_write_dsc_enable() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 1-u64max
PARAM_VALUE 1 offset 352
PARAM_VALUE 2 buffer 6978248487097511936
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c execute_synaptics_rc_command() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 1 offset 1216
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 16
BUF_SIZE 2 buffer 16
DATA_SOURCE 0 aux $0
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c execute_synaptics_rc_command() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 1212
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 4
BUF_SIZE 2 buffer 4
DATA_SOURCE 0 aux $0
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c execute_synaptics_rc_command() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 1208
PARAM_VALUE 2 buffer 4096-ptr_max
PARAM_VALUE 3 size 2
BUF_SIZE 2 buffer 2
DATA_SOURCE 0 aux $0
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c execute_synaptics_rc_command() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 1202
PARAM_VALUE 2 buffer 1826986907180773376
PARAM_VALUE 2 *buffer 129-130,161,177
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
RX_PATH
TASK_NOT_RUNNING
UNITS 3 size unit_byte

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c write_dsc_enable_synaptics_non_virtual_dpcd_mst() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->drm_dev 0,4096-ptr_max
PARAM_VALUE 1 offset 352
PARAM_VALUE 2 *buffer 1
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c write_dsc_enable_synaptics_non_virtual_dpcd_mst() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->drm_dev 0,4096-ptr_max
PARAM_VALUE 1 offset 352
PARAM_VALUE 2 *buffer 0
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/mediatek/mtk_dp.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 256-289,1536,8195
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
CAPPED_DATA 1 offset 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_dp_test.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 608-609
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
HARD_MAX 1 offset 609
LOCK2 &pool->lock

drivers/gpu/drm/i915/display/intel_dp_test.c intel_dp_process_phy_request() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 0 aux->hw_mutex.osq.tail.counter 0-s32max
PARAM_VALUE 1 offset 259
PARAM_VALUE 2 *buffer 0-255
BUF_SIZE 2 buffer 4
NOCHECK_CALL
LOCK2 &display->drm->mode_config.mutex
LOCK2 &pool->lock
HALF_LOCKED2 &display->drm->mode_config.connection_mutex
TYPE_LOCK (struct drm_mode_config)->connection_mutex
TYPE_LOCK (struct drm_mode_config)->mutex

drivers/gpu/drm/display/drm_dp_aux_dev.c auxdev_write_iter() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 2 buffer 4135073310540029952
PARAM_VALUE 3 size 0-16
BUF_SIZE 2 buffer 16
CAPPED_DATA 3 size 1
RX_PATH
TASK_NOT_RUNNING
USER_DATA 1 offset 0-u32max
USER_DATA 3 size 0-15[c]
UNITS 1 offset unit_byte
UNITS 3 size unit_byte
HALF_LOCKED2 &pool->lock

drivers/gpu/drm/nouveau/dispnv50/disp.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 1 offset 273,8195
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
BUF_SIZE 0 aux (-1),2992
BUF_SIZE 0 aux (-1),2992
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
HARD_MAX 1 offset 8195
RX_PATH
TASK_NOT_RUNNING
LOCK2 &outp->dp.hpd_irq_lock
TYPE_LOCK (struct nouveau_encoder)->dp.hpd_irq_lock

drivers/gpu/drm/display/drm_dp_helper.c drm_dp_dpcd_write_data() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 1 offset 258,267-521,608-609,624,704,1824-1826,1828,1832,1844,12370,12378-12379,12544,12672,12674,12676
PARAM_VALUE 3 size 1-3,128
BUF_SIZE 0 aux (-1)-0,2992
BUF_SIZE 0 aux (-1)-0,2992
BUF_SIZE 2 buffer (-1),2-4,6,128
BUF_SIZE 2 buffer (-1),2-4,6,128
CAPPED_DATA 1 offset 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
DATA_SOURCE 2 buffer $2
DATA_SOURCE 3 size $3
FUZZY_MAX 1 offset 1844
FUZZY_MAX 3 size 3
HARD_MAX 3 size 128
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/display/drm_dp_helper.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 0 aux 4096-ptr_max
PARAM_VALUE 1 offset 281,1536,983043,983045
PARAM_VALUE 2 *buffer 1-2,5-254
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
HARD_MAX 1 offset 983045
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/msm/dp/dp_link.c drm_dp_dpcd_writeb() -> drm_dp_dpcd_write()

Type Parameter Key Value
PARAM_VALUE 1 offset 608-609,1536
PARAM_VALUE 2 *buffer 0-255
PARAM_VALUE 3 size 1
DATA_SOURCE 0 aux $0
DATA_SOURCE 1 offset $1
HARD_MAX 1 offset 1536
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &encoder->bridge_chain_mutex
HALF_LOCKED2 &link->psm_mutex