Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 2 files:
- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c, line 2301
- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c, line 344
Smatch caller information:
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c dpu_encoder_phys_wb_setup() -> dpu_encoder_helper_phys_setup_cwb()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phys_enc | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->cdm_cfg.output_fmt->bpc_a | 0-1,3 |
| PARAM_VALUE | 0 | phys_enc->cdm_cfg.output_fmt->bpc_b_cb | 0-1,3 |
| PARAM_VALUE | 0 | phys_enc->cdm_cfg.output_fmt->bpc_g_y | 0-3 |
| PARAM_VALUE | 0 | phys_enc->cdm_cfg.output_fmt->bpc_r_cr | 0-1,3 |
| PARAM_VALUE | 0 | phys_enc->cdm_cfg.output_fmt->bpp | 0-4 |
| PARAM_VALUE | 0 | phys_enc->cdm_cfg.output_fmt->chroma_sample | 0-1,3 |
| PARAM_VALUE | 0 | phys_enc->cdm_cfg.output_fmt->fetch_mode | 0,2 |
| PARAM_VALUE | 0 | phys_enc->cdm_cfg.output_fmt->fetch_type | 0-2 |
| PARAM_VALUE | 0 | phys_enc->cdm_cfg.output_fmt->flags | 0,8-10,12-15,19 |
| PARAM_VALUE | 0 | phys_enc->cdm_cfg.output_fmt->num_planes | 0-4 |
| PARAM_VALUE | 0 | phys_enc->cdm_cfg.output_fmt->pixel_format | 0,808530000,808665410,808665426,808665665,808665688,808669761,808669784,808671298,808671314,825382478,825644622,842088770,842088786,842089025,842089048,842093121,842093144,842093913,842094158,842094169,842094658-u32max |
| PARAM_VALUE | 0 | phys_enc->cdm_cfg.output_fmt->tile_height | 0-1,4,8 |
| PARAM_VALUE | 0 | phys_enc->cdm_cfg.output_fmt->unpack_count | 0-4 |
| PARAM_VALUE | 0 | phys_enc->dpu_kms | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->dpu_kms->catalog | 0,4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->dpu_kms->catalog->mdss_ver->core_major_ver | 1,3-10,12-13 |
| PARAM_VALUE | 0 | phys_enc->dpu_kms->hw_mdp->hw.log_mask | 2,4,8,16,32,64,128,256,1024,2048,4096,8192 |
| PARAM_VALUE | 0 | phys_enc->dpu_kms->hw_vbif | 0,4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->dpu_kms->hw_vbif->cap | 0-s64max |
| PARAM_VALUE | 0 | phys_enc->hw_cdm | 0,4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->hw_cdm->hw.log_mask | 2,4,8,16,32,64,128,256,1024,2048,4096,8192 |
| PARAM_VALUE | 0 | phys_enc->hw_ctl->hw.log_mask | 2,4,8,16,32,64,128,256,1024,2048,4096,8192 |
| PARAM_VALUE | 0 | phys_enc->hw_ctl->mdss_ver->core_major_ver | 1,3-10,12-13 |
| PARAM_VALUE | 0 | phys_enc->hw_pp->merge_3d->hw.log_mask | 2,4,8,16,32,64,128,256,1024,2048,4096,8192 |
| PARAM_VALUE | 0 | phys_enc->hw_wb | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->hw_wb->caps | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->hw_wb->caps->xin_id | 6 |
| PARAM_VALUE | 0 | phys_enc->hw_wb->hw.log_mask | 2,4,8,16,32,64,128,256,1024,2048,4096,8192 |
| PARAM_VALUE | 0 | phys_enc->ops.prepare_for_kickoff | 1-u64max |
| PARAM_VALUE | 0 | phys_enc->parent | 0,4096-ptr_max |
| PARAM_VALUE | 0 | *phys_enc->dpu_kms->hw_intr->cache_irq_mask | 0-4294967295 |
| PARAM_VALUE | 1 | enable | 1 |
| DATA_SOURCE | 0 | phys_enc | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | phys_enc->cached_mode.clock |
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c dpu_encoder_helper_phys_cleanup() -> dpu_encoder_helper_phys_setup_cwb()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | phys_enc | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->dpu_kms | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->dpu_kms->catalog->mdss_ver->core_major_ver | 1,3-10,12-13 |
| PARAM_VALUE | 0 | phys_enc->enable_state | 0,2-u32max |
| PARAM_VALUE | 0 | phys_enc->hw_ctl | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->hw_ctl->hw.log_mask | 2,4,8,16,32,64,128,256,1024,2048,4096,8192 |
| PARAM_VALUE | 0 | phys_enc->hw_ctl->ops.update_pending_flush_intf | 5088479448453898240,7881995958973857792 |
| PARAM_VALUE | 0 | phys_enc->hw_ctl->ops.update_pending_flush_wb | 3825457689994338304,4224449274849132544 |
| PARAM_VALUE | 0 | phys_enc->hw_intf->hw.log_mask | 2,4,8,16,32,64,128,256,1024,2048,4096,8192 |
| PARAM_VALUE | 0 | phys_enc->hw_intf->mdss_ver->core_major_ver | 1,3-10,12-13 |
| PARAM_VALUE | 0 | phys_enc->hw_intf->ops.bind_pingpong_blk | 3035196883863601152 |
| PARAM_VALUE | 0 | phys_enc->hw_intf->ops.enable_timing | 3538371962127917056 |
| PARAM_VALUE | 0 | phys_enc->hw_intf->ops.get_status | 1094095729127616512 |
| PARAM_VALUE | 0 | phys_enc->hw_pp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->hw_pp->caps->sblk->dither.base | 0,192,224,800,5888,6080,6144,6656,12512 |
| PARAM_VALUE | 0 | phys_enc->hw_pp->hw.log_mask | 2,4,8,16,32,64,128,256,1024,2048,4096,8192 |
| PARAM_VALUE | 0 | phys_enc->hw_pp->ops.setup_dither | 104695616033189888 |
| PARAM_VALUE | 0 | phys_enc->hw_wb | 0,4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->hw_wb->hw.log_mask | 2,4,8,16,32,64,128,256,1024,2048,4096,8192 |
| PARAM_VALUE | 0 | phys_enc->ops.disable | 1-u64max |
| PARAM_VALUE | 0 | phys_enc->parent | 4096-ptr_max |
| PARAM_VALUE | 0 | phys_enc->parent->crtc | 4096-ptr_max |
| PARAM_VALUE | 0 | *phys_enc->hw_ctl->pending_dspp_flush_mask | 0-4294967295 |
| PARAM_VALUE | 1 | enable | 0 |
| CAPPED_DATA | 0 | phys_enc | 1 |
| CAPPED_DATA | 0 | phys_enc->hw_ctl->mixer_count | 1 |
| DATA_SOURCE | 0 | phys_enc | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | &dpu_enc->enc_lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &state->dev->mode_config.connection_mutex | ||
| HALF_LOCKED2 | &state->dev->mode_config.connection_mutex.mutex | ||
| TYPE_LOCK | (struct dpu_encoder_virt)->enc_lock |