Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 2 files:
- drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c, line 394
- drivers/gpu/drm/amd/display/dc/dpp/dcn201/dcn201_dpp.c, line 278
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn10/dcn10_hwseq.c dcn10_set_input_transfer_func() -> (struct dpp_funcs)->dpp_program_degamma_pwl()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dpp_base | 4096-ptr_max |
| PARAM_VALUE | 0 | dpp_base->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | dpp_base->ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | dpp_base->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| CONTAINER | 0 | -176-0+0 | $(-1) |
| CONTAINER | 1 | -176-0+19248 | $(-1) |
| MEM_ZERO | 0 | &dpp_base->degamma_params | |
| MEM_ZERO | 1 | params | |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn10/dcn10_hwseq.c dcn10_set_input_transfer_func() -> (struct dpp_funcs)->dpp_program_degamma_pwl()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dpp_base | 4096-ptr_max |
| PARAM_VALUE | 0 | dpp_base->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | dpp_base->ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | dpp_base->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| CONTAINER | 0 | -176-0+0 | $(-1) |
| CONTAINER | 1 | -176-0+19248 | $(-1) |
| MEM_ZERO | 0 | &dpp_base->degamma_params | |
| MEM_ZERO | 1 | params | |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn20/dcn20_hwseq.c dcn20_set_input_transfer_func() -> (struct dpp_funcs)->dpp_program_degamma_pwl()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dpp_base | 4096-ptr_max |
| PARAM_VALUE | 0 | dpp_base->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| CONTAINER | 0 | -176-0+0 | $(-1) |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn20/dcn20_hwseq.c dcn20_set_input_transfer_func() -> (struct dpp_funcs)->dpp_program_degamma_pwl()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dpp_base | 4096-ptr_max |
| PARAM_VALUE | 0 | dpp_base->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| CONTAINER | 0 | -176-0+0 | $(-1) |
| CONTAINER | 1 | -176-0+19248 | $(-1) |
| MEM_ZERO | 0 | &dpp_base->degamma_params | |
| MEM_ZERO | 1 | params | |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn20/dcn20_hwseq.c dcn20_set_input_transfer_func() -> (struct dpp_funcs)->dpp_program_degamma_pwl()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dpp_base | 4096-ptr_max |
| PARAM_VALUE | 0 | dpp_base->funcs | 4096-ptr_max |
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| CONTAINER | 0 | -176-0+0 | $(-1) |
| CONTAINER | 1 | -176-0+19248 | $(-1) |
| MEM_ZERO | 0 | &dpp_base->degamma_params | |
| MEM_ZERO | 1 | params | |
| NOCHECK_CALL |