Documented in 1 files:

Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/dpll/dpll_netlink.c dpll_cmd_pin_get_one() -> dpll_pin_own_dpll_ref_first()

Type Parameter Key Value
PARAM_VALUE 0 pin 1-u64max
PARAM_VALUE 0 pin->fwnode->ops->put 0,7972878730091065344,8942618317634842624
BUF_SIZE 0 pin s32min-(-1),1-s32max
BUF_SIZE 0 pin s32min-(-1),1-s32max
DATA_SOURCE 0 pin $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 global &dpll_lock

drivers/dpll/dpll_netlink.c dpll_pin_esync_set() -> dpll_pin_own_dpll_ref_first()

Type Parameter Key Value
BUF_SIZE 0 pin s32min-(-2),1-s32max
BUF_SIZE 0 pin s32min-(-2),1-s32max
DATA_SOURCE 0 pin $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->lock
HALF_LOCKED2 &devlink->lock
HALF_LOCKED2 &net->xfrm.xfrm_cfg_mutex
HALF_LOCKED2 global &audit_cmd_mutex.lock
HALF_LOCKED2 global &cb_lock
HALF_LOCKED2 global &crypto_cfg_mutex
HALF_LOCKED2 global &dpll_lock
HALF_LOCKED2 global &hwsim_phys_lock
HALF_LOCKED2 global &net_dm_mutex
HALF_LOCKED2 global &rtnl_mutex
HALF_LOCKED2 global &rx_queue_mutex
HALF_LOCKED2 rcu_read

drivers/dpll/dpll_netlink.c dpll_pin_freq_set() -> dpll_pin_own_dpll_ref_first()

Type Parameter Key Value
PARAM_VALUE 0 pin 4096-ptr_max
PARAM_VALUE 0 pin->prop.freq_supported_num 1-u32max
BUF_SIZE 0 pin s32min-(-2),1-s32max
BUF_SIZE 0 pin s32min-(-2),1-s32max
DATA_SOURCE 0 pin $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->lock
HALF_LOCKED2 &devlink->lock
HALF_LOCKED2 &net->xfrm.xfrm_cfg_mutex
HALF_LOCKED2 global &audit_cmd_mutex.lock
HALF_LOCKED2 global &cb_lock
HALF_LOCKED2 global &crypto_cfg_mutex
HALF_LOCKED2 global &dpll_lock
HALF_LOCKED2 global &hwsim_phys_lock
HALF_LOCKED2 global &net_dm_mutex
HALF_LOCKED2 global &rtnl_mutex
HALF_LOCKED2 global &rx_queue_mutex
HALF_LOCKED2 rcu_read

drivers/dpll/dpll_netlink.c dpll_pin_phase_adj_set() -> dpll_pin_own_dpll_ref_first()

Type Parameter Key Value
PARAM_VALUE 0 pin 4096-ptr_max
BUF_SIZE 0 pin s32min-(-2),1-s32max
BUF_SIZE 0 pin s32min-(-2),1-s32max
CAPPED_DATA 0 pin->prop.phase_range.min 1
DATA_SOURCE 0 pin $0
PARAM_COMPARE 0 pin->prop.phase_range.max >= $0->prop.phase_range.min
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->lock
HALF_LOCKED2 &devlink->lock
HALF_LOCKED2 &net->xfrm.xfrm_cfg_mutex
HALF_LOCKED2 global &audit_cmd_mutex.lock
HALF_LOCKED2 global &cb_lock
HALF_LOCKED2 global &crypto_cfg_mutex
HALF_LOCKED2 global &dpll_lock
HALF_LOCKED2 global &hwsim_phys_lock
HALF_LOCKED2 global &net_dm_mutex
HALF_LOCKED2 global &rtnl_mutex
HALF_LOCKED2 global &rx_queue_mutex
HALF_LOCKED2 rcu_read

drivers/dpll/dpll_netlink.c dpll_pin_ref_sync_state_set() -> dpll_pin_own_dpll_ref_first()

Type Parameter Key Value
BUF_SIZE 0 pin s32min-(-2),1-s32max
BUF_SIZE 0 pin s32min-(-2),1-s32max
DATA_SOURCE 0 pin $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->lock
HALF_LOCKED2 &devlink->lock
HALF_LOCKED2 &net->xfrm.xfrm_cfg_mutex
HALF_LOCKED2 global &audit_cmd_mutex.lock
HALF_LOCKED2 global &cb_lock
HALF_LOCKED2 global &crypto_cfg_mutex
HALF_LOCKED2 global &dpll_lock
HALF_LOCKED2 global &hwsim_phys_lock
HALF_LOCKED2 global &net_dm_mutex
HALF_LOCKED2 global &rtnl_mutex
HALF_LOCKED2 global &rx_queue_mutex
HALF_LOCKED2 rcu_read