Defined in 1 files as a prototype:

Defined in 1 files as a member:

Defined in 1 files as a function:

Referenced in 6 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_phy.c dp_set_fec_enable() -> dp_should_enable_fec()

Type Parameter Key Value
PARAM_VALUE 0 link 4096-ptr_max
PARAM_VALUE 0 link->dc 4096-ptr_max
CAPPED_DATA 0 link 1
DATA_SOURCE 0 link $0
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_phy.c dp_set_fec_ready() -> dp_should_enable_fec()

Type Parameter Key Value
PARAM_VALUE 0 link 4096-ptr_max
PARAM_VALUE 0 link->dc 4096-ptr_max
CAPPED_DATA 0 link 1
DATA_SOURCE 0 link $0
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_validation.c dp_link_bandwidth_kbps() -> dp_should_enable_fec()

Type Parameter Key Value
PARAM_VALUE 0 link 4096-ptr_max
BUF_SIZE 0 link->dc (-1),3059296
DATA_SOURCE 0 link $0
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL 0-u32max
HOST_DATA 0 link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL2 0-u32max
HOST_DATA 0 link->panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL 0-u32max

drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_exports.c dc_link_should_enable_fec() -> (struct link_service)->dp_should_enable_fec()

Type Parameter Key Value
PARAM_VALUE 0 link 4096-ptr_max
PARAM_VALUE 0 link->dc 4096-ptr_max
PARAM_VALUE 0 link->dc->link_srv 4096-ptr_max
DATA_SOURCE 0 link $0
CONTAINER 0 -408-1872-488+0 $(-1)

drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dpia.c enable_dpia_link_output() -> (struct link_service)->dp_should_enable_fec()

Type Parameter Key Value
PARAM_VALUE 0 link 4096-ptr_max
PARAM_VALUE 0 link->ctx 4096-ptr_max
PARAM_VALUE 0 link->ctx->dc 4096-ptr_max
PARAM_VALUE 0 link->ctx->dc->clk_mgr->funcs->notify_link_rate_change 0,879894308257263616,2937398182047252480,7502416791745617920
PARAM_VALUE 0 link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma -inf-1.797693e+308
PARAM_VALUE 0 link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma -inf-1.797693e+308
PARAM_VALUE 0 link->ctx->dc->link_srv 4096-ptr_max
PARAM_VALUE 0 link->ctx->dc->res_pool 4096-ptr_max
PARAM_VALUE 0 link->ctx->dc_bios->funcs->external_encoder_control 0,4096-ptr_max
PARAM_VALUE 0 link->dc 4096-ptr_max
PARAM_VALUE 0 link->dc->current_state 4096-ptr_max
PARAM_VALUE 0 link->dc->link_srv 4096-ptr_max
PARAM_VALUE 0 link->dc->res_pool 4096-ptr_max
CAPPED_DATA 0 link 1
DATA_SOURCE 0 link $0
CONTAINER 0 -408-1872-488+0 $(-1)
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/amd/amdgpu/../display/dc/dio/dcn31/dcn31_dio_link_encoder.c dcn31_link_encoder_enable_dp_mst_output() -> (struct link_service)->dp_should_enable_fec()

Type Parameter Key Value
PARAM_VALUE 0 link 4096-ptr_max
PARAM_VALUE 0 link->dc 4096-ptr_max
PARAM_VALUE 0 link->dc->link_srv 4096-ptr_max
DATA_SOURCE 0 link r link_enc_cfg_get_link_using_link_enc
CONTAINER 0 -408-1872-488+0 $(-1)
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/amd/amdgpu/../display/dc/dio/dcn31/dcn31_dio_link_encoder.c dcn31_link_encoder_enable_dp_output() -> (struct link_service)->dp_should_enable_fec()

Type Parameter Key Value
PARAM_VALUE 0 link 4096-ptr_max
PARAM_VALUE 0 link->dc 4096-ptr_max
PARAM_VALUE 0 link->dc->link_srv 4096-ptr_max
DATA_SOURCE 0 link r link_enc_cfg_get_link_using_link_enc
CONTAINER 0 -408-1872-488+0 $(-1)
RX_PATH
TASK_NOT_RUNNING