Defined in 1 files as a function:
Referenced in 1 files:
Smatch caller information:
drivers/gpu/drm/i915/display/intel_dmc.c dmc_firmware_param_disabled() -> dmc_firmware_param()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| BUF_SIZE | 0 | display | 8416 |
| BUF_SIZE | 0 | display->hotplug.dp_wq | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.cleanup | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.flip | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.modeset | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.unordered | (-1),512,528-8720 |
| CAPPED_DATA | 0 | display->power.domains.power_well_count | 1 |
| DATA_SOURCE | 0 | display | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | display->cdclk.hw.joined_mbus | 0-1 |
| HOST_DATA | 0 | display->dmc.dmc->dc6_allowed.dc5_start | 0-u32max |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
| NO_OVERFLOW_SIMPLE | 0 | display->drm->num_crtcs | |
| HALF_LOCKED2 | &pdev->dev.mutex | ||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_dmc.c dmc_load_work_fn() -> dmc_firmware_param()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_dmc.c intel_dmc_init() -> dmc_firmware_param()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| BUF_SIZE | 0 | display | 8416 |
| BUF_SIZE | 0 | display->hotplug.dp_wq | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.cleanup | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.flip | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.modeset | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.unordered | (-1),512,528-8720 |
| CAPPED_DATA | 0 | display->power.domains.power_well_count | 1 |
| DATA_SOURCE | 0 | display | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | display->cdclk.hw.joined_mbus | 0-1 |
| HOST_DATA | 0 | display->dmc.dmc->dc6_allowed.dc5_start | 0-u32max |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
| NO_OVERFLOW_SIMPLE | 0 | display->drm->num_crtcs | |
| HALF_LOCKED2 | &pdev->dev.mutex | ||
| HALF_LOCKED2 | &pool->lock |
drivers/gpu/drm/i915/display/intel_dmc.c intel_dmc_init() -> dmc_firmware_param()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | display | 4096-ptr_max |
| PARAM_VALUE | 0 | display->params.dmc_firmware_path | 4096-ptr_max |
| PARAM_VALUE | 0 | *display->params.dmc_firmware_path | 1-255 |
| BUF_SIZE | 0 | display | 8416 |
| BUF_SIZE | 0 | display->hotplug.dp_wq | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.cleanup | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.flip | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.modeset | (-1),512,528-8720 |
| BUF_SIZE | 0 | display->wq.unordered | (-1),512,528-8720 |
| CAPPED_DATA | 0 | display->power.domains.power_well_count | 1 |
| DATA_SOURCE | 0 | display | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | display->cdclk.hw.joined_mbus | 0-1 |
| HOST_DATA | 0 | display->dmc.dmc->dc6_allowed.dc5_start | 0-u32max |
| HOST_DATA | 0 | display->power.domains.dc_state | 0-u32max |
| NO_OVERFLOW_SIMPLE | 0 | display->drm->num_crtcs | |
| HALF_LOCKED2 | &pdev->dev.mutex | ||
| HALF_LOCKED2 | &pool->lock |