Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 30 files:

Smatch caller information:

drivers/clk/sunxi-ng/ccu_div.c ccu_div_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate r ccu_mux_helper_apply_prediv
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 2 val 0-u32max[c]
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/x86/clk-cgu.c lgm_clk_divider_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
DATA_SOURCE 2 val r lgm_get_clk_val
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/qcom/clk-regmap-divider.c div_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 3 table 0
PARAM_VALUE 4 flags 16
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/xilinx/clk-xlnx-clock-wizard.c clk_wzrd_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 2 val 0-255
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 2 val 0-255[c]
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/xilinx/clk-xlnx-clock-wizard.c clk_wzrd_recalc_rate_all_ver() -> divider_recalc_rate()

Type Parameter Key Value
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1 [m]
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
USER_DATA 1 parent_rate 0-9223372030412324865[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/xilinx/clk-xlnx-clock-wizard.c clk_wzrd_ver_determine_rate_all() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 1 parent_rate 0
PARAM_VALUE 2 val 0-62853
DATA_SOURCE 0 hw $0
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 1 parent_rate 0[c]
USER_DATA 1 parent_rate 0

drivers/clk/renesas/rzv2h-cpg.c rzv2h_ddiv_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 2 val 0-u32max[c]
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/clk-divider.c clk_divider_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 2 val 0-u32max[c]
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/imx/clk-composite-8m.c imx8m_clk_composite_divider_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 3 table 0
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 2 val 0-u32max[c]
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/imx/clk-composite-8m.c imx8m_clk_composite_divider_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 2 val 0-63
PARAM_VALUE 3 table 0
PARAM_VALUE 5 width 6
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 1 parent_rate 0-28311145769803764[c]
HOST_DATA 2 val 0-63[c]
USER_DATA 1 parent_rate 0-9223372064772063217[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/sophgo/clk-sg2044.c _sg2044_div_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 0 hw 4096-ptr_max
PARAM_VALUE 3 table 0
CAPPED_DATA 2 val 1
DATA_SOURCE 1 parent_rate $2
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 2 val 0-u16max[c]
USER_DATA 1 parent_rate 0-s32max[c]
HALF_LOCKED2 clk

drivers/clk/renesas/rzg2l-cpg.c rzg3s_div_clk_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 4 flags 16
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 2 val 0-u32max[c]
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/sprd/div.c sprd_div_helper_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 0 hw 4096-ptr_max
PARAM_VALUE 3 table 0
PARAM_VALUE 4 flags 0
DATA_SOURCE 1 parent_rate $2
RX_PATH
TASK_NOT_RUNNING
USER_DATA 1 parent_rate 0-s32max[c]
HALF_LOCKED2 clk

drivers/clk/sophgo/clk-sg2042-clkgen.c sg2042_clk_divider_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 3 table 0
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 2 val 0-u16max[c]
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/microchip/clk-mpfs.c mpfs_cfg_clk_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 2 val 0-4095
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/imx/clk-divider-gate.c clk_divider_gate_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 0 hw 4096-ptr_max
PARAM_VALUE 0 hw->core 4096-ptr_max
PARAM_VALUE 0 hw->core->dev->power.deferred_resume 0-1
PARAM_VALUE 0 hw->core->dev->power.idle_notification 0-1
PARAM_VALUE 0 hw->core->dev->power.request 0-4
PARAM_VALUE 0 hw->core->dev->power.request_pending 0-1
PARAM_VALUE 0 hw->core->dev->power.runtime_error s32min-(-17),(-15)-(-14),(-12),(-10)-s32max
PARAM_VALUE 0 hw->core->dev->power.runtime_status s32min-s32max
PARAM_VALUE 0 hw->core->dev->power.timer_autosuspends 0-1
PARAM_VALUE 0 hw->core->dev->power.usage_count.counter s32min-s32max
PARAM_VALUE 0 hw->core->dev->power.wakeirq->status 0-4294967295
PARAM_VALUE 0 hw->core->ops s64min-(-4096),4096-s64max
PARAM_VALUE 0 hw->core->parent->dev->power.deferred_resume 0-1
PARAM_VALUE 0 hw->core->parent->dev->power.idle_notification 0-1
PARAM_VALUE 0 hw->core->parent->dev->power.request 0-4
PARAM_VALUE 0 hw->core->parent->dev->power.request_pending 0-1
PARAM_VALUE 0 hw->core->parent->dev->power.runtime_error s32min-(-17),(-15)-(-14),(-12),(-10)-s32max
PARAM_VALUE 0 hw->core->parent->dev->power.runtime_status s32min-s32max
PARAM_VALUE 0 hw->core->parent->dev->power.timer_autosuspends 0-1
PARAM_VALUE 0 hw->core->parent->dev->power.usage_count.counter s32min-s32max
PARAM_VALUE 0 hw->core->parent->dev->power.wakeirq->status 0-4294967295
PARAM_VALUE 2 val 1-u32max
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 2 val 1-u32max[c]
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/imx/clk-divider-gate.c clk_divider_gate_recalc_rate_ro() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 2 val 1-u32max
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 2 val 1-u32max[c]
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/sophgo/clk-cv18xx-ip.c div_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 2 val 1-u32max
PARAM_VALUE 3 table 0
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
CAPPED_DATA 2 val 1
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
DATA_SOURCE 2 val r div_helper_get_clockdiv
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/sophgo/clk-cv18xx-ip.c mmux_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 2 val 1-u32max
PARAM_VALUE 3 table 0
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
CAPPED_DATA 2 val 1
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
DATA_SOURCE 2 val r div_helper_get_clockdiv
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/sophgo/clk-cv18xx-ip.c mux_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 2 val 1-u32max
PARAM_VALUE 3 table 0
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
CAPPED_DATA 2 val 1
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
DATA_SOURCE 2 val r div_helper_get_clockdiv
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/clk-bm1880.c bm1880_clk_div_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 2 val 0-u32max[c]
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/clk-versaclock3.c vc3_div_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/phy/ti/phy-j721e-wiz.c wiz_clk_div_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 4 flags 0
PARAM_VALUE 5 width 2
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/spacemit/ccu_mix.c ccu_div_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 3 table 0
PARAM_VALUE 4 flags 0
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/thead/clk-th1520-ap.c ccu_div_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 3 table 0
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c dsi_pll_14nm_postdiv_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 2 val 0-15
PARAM_VALUE 3 table 0
PARAM_VALUE 5 width 0,4
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw (-1),48
BUF_SIZE 0 hw->core (-1),32,40-10200
DATA_SOURCE 0 hw $0
DATA_SOURCE 1 parent_rate $1
STR_LEN 0 hw->core->dev (-1),2-20,22-24,31,39,63
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 2 val 0-15[c]
USER_DATA 1 parent_rate 0-s32max[c]
NO_OVERFLOW_SIMPLE 0 hw->core->num_parents
HALF_LOCKED2 clk

drivers/clk/actions/owl-divider.c owl_divider_helper_recalc_rate() -> divider_recalc_rate()

Type Parameter Key Value
PARAM_VALUE 0 hw 4096-ptr_max
DATA_SOURCE 1 parent_rate $2
RX_PATH
TASK_NOT_RUNNING
USER_DATA 1 parent_rate 0-s32max[c]
HALF_LOCKED2 clk