Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 3 files:
- drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c, line 873
- drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c, line 916
- drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c, line 960
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn401/dcn401_resource.c dcn401_clock_source_create() -> dcn401_clk_src_construct()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | clk_src | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx | 4096-ptr_max |
| PARAM_VALUE | 2 | bios | 4096-ptr_max |
| PARAM_VALUE | 2 | bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 2 | bios->regs | 6751871204405284864 |
| PARAM_VALUE | 3 | id | 8-12 |
| PARAM_VALUE | 4 | regs | 7450886455611211776,7450886455611211780,7450886455611211784,7450886455611211788 |
| PARAM_VALUE | 5 | cs_shift | 8500051911616729088 |
| PARAM_VALUE | 6 | cs_mask | 4765475328544980992 |
| BUF_SIZE | 0 | clk_src | 256 |
| BUF_SIZE | 1 | ctx->dc_bios->regs | 12 |
| BUF_SIZE | 2 | bios->regs | 12 |
| BUF_SIZE | 4 | regs | 176,264,352,440 |
| BUF_SIZE | 4 | regs | 176,264,352,440 |
| DATA_SOURCE | 0 | clk_src | r _kzalloc_noprof |
| DATA_SOURCE | 1 | ctx | $0 |
| DATA_SOURCE | 2 | bios | $1 |
| DATA_SOURCE | 3 | id | $2 |
| DATA_SOURCE | 4 | regs | $3 |
| HARD_MAX | 3 | id | 12 |
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn42b/dcn42b_resource.c dcn42b_clock_source_create() -> dcn401_clk_src_construct()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | clk_src | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx | 4096-ptr_max |
| PARAM_VALUE | 2 | bios | 4096-ptr_max |
| PARAM_VALUE | 2 | bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 2 | bios->regs | 4269571713092587520 |
| PARAM_VALUE | 3 | id | 8-11 |
| PARAM_VALUE | 4 | regs | 4298858580741144576,4298858580741144580,4298858580741144584 |
| PARAM_VALUE | 5 | cs_shift | 5898173824701992960 |
| PARAM_VALUE | 6 | cs_mask | 2535504627600330752 |
| BUF_SIZE | 0 | clk_src | 256 |
| BUF_SIZE | 1 | ctx->dc_bios->regs | 12 |
| BUF_SIZE | 2 | bios->regs | 12 |
| BUF_SIZE | 4 | regs | 264,352,440 |
| BUF_SIZE | 4 | regs | 264,352,440 |
| DATA_SOURCE | 0 | clk_src | r _kzalloc_noprof |
| DATA_SOURCE | 1 | ctx | $0 |
| DATA_SOURCE | 2 | bios | $1 |
| DATA_SOURCE | 3 | id | $2 |
| DATA_SOURCE | 4 | regs | $3 |
| HARD_MAX | 3 | id | 11 |
drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn42/dcn42_resource.c dcn42_clock_source_create() -> dcn401_clk_src_construct()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | clk_src | 4096-ptr_max |
| PARAM_VALUE | 1 | ctx | 4096-ptr_max |
| PARAM_VALUE | 2 | bios | 4096-ptr_max |
| PARAM_VALUE | 2 | bios->funcs | 4096-ptr_max |
| PARAM_VALUE | 2 | bios->regs | 8918717857038331904 |
| PARAM_VALUE | 3 | id | 8-13 |
| PARAM_VALUE | 4 | regs | 578857703674765312,578857703674765316,578857703674765320,578857703674765324,578857703674765328 |
| PARAM_VALUE | 5 | cs_shift | 6577106986746085376 |
| PARAM_VALUE | 6 | cs_mask | 1503904552791228416 |
| BUF_SIZE | 0 | clk_src | 256 |
| BUF_SIZE | 1 | ctx->dc_bios->regs | 12 |
| BUF_SIZE | 2 | bios->regs | 12 |
| BUF_SIZE | 4 | regs | (-1),176,264,352,440 |
| BUF_SIZE | 4 | regs | (-1),176,264,352,440 |
| DATA_SOURCE | 0 | clk_src | r _kzalloc_noprof |
| DATA_SOURCE | 1 | ctx | $0 |
| DATA_SOURCE | 2 | bios | $1 |
| DATA_SOURCE | 3 | id | $2 |
| DATA_SOURCE | 4 | regs | $3 |
| HARD_MAX | 3 | id | 13 |