Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c dcn31_smu_enable_phy_refclk_pwrdwn() -> dcn31_smu_send_msg_with_param()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr 4096-ptr_max
PARAM_VALUE 0 clk_mgr->smu_present 1
PARAM_VALUE 1 msg_id 18
PARAM_VALUE 2 param 0
DATA_SOURCE 0 clk_mgr $0
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c dcn31_smu_enable_pme_wa() -> dcn31_smu_send_msg_with_param()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr 4096-ptr_max
PARAM_VALUE 0 clk_mgr->smu_present 1
PARAM_VALUE 1 msg_id 13
PARAM_VALUE 2 param 0
DATA_SOURCE 0 clk_mgr $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c dcn31_smu_get_smu_version() -> dcn31_smu_send_msg_with_param()

Type Parameter Key Value
PARAM_VALUE 1 msg_id 2
PARAM_VALUE 2 param 0
DATA_SOURCE 0 clk_mgr $0

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c dcn31_smu_set_dispclk() -> dcn31_smu_send_msg_with_param()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr 4096-ptr_max
PARAM_VALUE 0 clk_mgr->smu_present 1
PARAM_VALUE 1 msg_id 4
DATA_SOURCE 0 clk_mgr $0

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c dcn31_smu_set_display_idle_optimization() -> dcn31_smu_send_msg_with_param()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr 4096-ptr_max
PARAM_VALUE 0 clk_mgr->base.ctx 4096-ptr_max
PARAM_VALUE 0 clk_mgr->base.ctx->dc 4096-ptr_max
PARAM_VALUE 0 clk_mgr->base.ctx->dc->debug.pstate_enabled 1
PARAM_VALUE 0 clk_mgr->smu_present 1
PARAM_VALUE 1 msg_id 18
PARAM_VALUE 2 param 0
DATA_SOURCE 0 clk_mgr $0
DATA_SOURCE 2 param $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 _T->lock

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c dcn31_smu_set_dppclk() -> dcn31_smu_send_msg_with_param()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr 4096-ptr_max
PARAM_VALUE 0 clk_mgr->smu_present 1
PARAM_VALUE 1 msg_id 6
DATA_SOURCE 0 clk_mgr $0

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c dcn31_smu_set_dprefclk() -> dcn31_smu_send_msg_with_param()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr 4096-ptr_max
PARAM_VALUE 0 clk_mgr->smu_present 1
PARAM_VALUE 1 msg_id 5
DATA_SOURCE 0 clk_mgr $0

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c dcn31_smu_set_dram_addr_high() -> dcn31_smu_send_msg_with_param()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr 4096-ptr_max
PARAM_VALUE 0 clk_mgr->smu_present 1
PARAM_VALUE 0 clk_mgr->smu_ver s32min-(-1),1-s32max
PARAM_VALUE 1 msg_id 14
DATA_SOURCE 0 clk_mgr $0
DATA_SOURCE 2 param $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c dcn31_smu_set_dram_addr_low() -> dcn31_smu_send_msg_with_param()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr 4096-ptr_max
PARAM_VALUE 0 clk_mgr->smu_present 1
PARAM_VALUE 0 clk_mgr->smu_ver s32min-(-1),1-s32max
PARAM_VALUE 1 msg_id 15
DATA_SOURCE 0 clk_mgr $0
DATA_SOURCE 2 param $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c dcn31_smu_set_dtbclk() -> dcn31_smu_send_msg_with_param()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr 4096-ptr_max
PARAM_VALUE 0 clk_mgr->smu_present 1
PARAM_VALUE 1 msg_id 23
DATA_SOURCE 0 clk_mgr $0
DATA_SOURCE 2 param $1
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c dcn31_smu_set_hard_min_dcfclk() -> dcn31_smu_send_msg_with_param()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr 4096-ptr_max
PARAM_VALUE 0 clk_mgr->base.ctx 4096-ptr_max
PARAM_VALUE 0 clk_mgr->base.ctx->dc 4096-ptr_max
PARAM_VALUE 0 clk_mgr->base.ctx->dc->debug.pstate_enabled 1
PARAM_VALUE 0 clk_mgr->smu_present 1
PARAM_VALUE 1 msg_id 7
DATA_SOURCE 0 clk_mgr $0

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c dcn31_smu_set_min_deep_sleep_dcfclk() -> dcn31_smu_send_msg_with_param()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr 4096-ptr_max
PARAM_VALUE 0 clk_mgr->base.ctx 4096-ptr_max
PARAM_VALUE 0 clk_mgr->base.ctx->dc 4096-ptr_max
PARAM_VALUE 0 clk_mgr->base.ctx->dc->debug.pstate_enabled 1
PARAM_VALUE 0 clk_mgr->smu_present 1
PARAM_VALUE 1 msg_id 8
DATA_SOURCE 0 clk_mgr $0

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c dcn31_smu_set_zstate_support() -> dcn31_smu_send_msg_with_param()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr 4096-ptr_max
PARAM_VALUE 0 clk_mgr->base.ctx 4096-ptr_max
PARAM_VALUE 0 clk_mgr->base.ctx->dc 4096-ptr_max
PARAM_VALUE 0 clk_mgr->smu_present 1
PARAM_VALUE 1 msg_id 21-22
PARAM_VALUE 2 param 0-1
DATA_SOURCE 0 clk_mgr $0
FUZZY_MAX 1 msg_id 22
FUZZY_MAX 2 param 1
BIT_INFO 1 msg_id 0x14,0x17
HARD_MAX 1 msg_id 22
HARD_MAX 2 param 1
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c dcn31_smu_transfer_dpm_table_smu_2_dram() -> dcn31_smu_send_msg_with_param()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr 4096-ptr_max
PARAM_VALUE 0 clk_mgr->smu_present 1
PARAM_VALUE 1 msg_id 16
PARAM_VALUE 2 param 4
DATA_SOURCE 0 clk_mgr $0
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.c dcn31_smu_transfer_wm_table_dram_2_smu() -> dcn31_smu_send_msg_with_param()

Type Parameter Key Value
PARAM_VALUE 0 clk_mgr 4096-ptr_max
PARAM_VALUE 0 clk_mgr->smu_present 1
PARAM_VALUE 0 clk_mgr->smu_ver s32min-(-1),1-s32max
PARAM_VALUE 1 msg_id 17
PARAM_VALUE 2 param 1
DATA_SOURCE 0 clk_mgr $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL