| PARAM_VALUE |
0 |
port |
4096-ptr_max |
| PARAM_VALUE |
0 |
port->regions.xa_lock.rlock.dep_map->name |
0-255 |
| PARAM_VALUE |
1 |
cxlr |
4096-ptr_max |
| PARAM_VALUE |
1 |
cxlr->cxlrd |
4096-ptr_max |
| PARAM_VALUE |
1 |
cxlr->cxlrd->cxlsd.cxld.dev.parent |
4096-ptr_max |
| PARAM_VALUE |
1 |
cxlr->cxlrd->cxlsd.target |
4096-ptr_max |
| PARAM_VALUE |
1 |
cxlr->mode |
0-1 |
| PARAM_VALUE |
1 |
cxlr->params.interleave_ways |
(-2147483647)-s32max |
| PARAM_VALUE |
1 |
cxlr->params.nr_targets |
s32min-2147483646 |
| PARAM_VALUE |
1 |
cxlr->params.res |
4096-ptr_max |
| PARAM_VALUE |
1 |
cxlr->params.state |
1 |
| PARAM_VALUE |
2 |
cxled |
4096-ptr_max |
| PARAM_VALUE |
2 |
cxled->cxld.dev.parent |
4096-ptr_max |
| PARAM_VALUE |
3 |
cxl_rr |
4096-ptr_max |
| PARAM_VALUE |
3 |
cxl_rr->endpoints.xa_flags |
0 |
| PARAM_VALUE |
3 |
cxl_rr->endpoints.xa_head |
0 |
| PARAM_VALUE |
3 |
cxl_rr->nr_targets |
1 |
| PARAM_VALUE |
3 |
cxl_rr->port |
4096-ptr_max |
| PARAM_VALUE |
3 |
cxl_rr->region |
4096-ptr_max |
| PARAM_VALUE |
3 |
cxl_rr->region->cxlrd |
4096-ptr_max |
| PARAM_VALUE |
3 |
cxl_rr->region->mode |
0-1 |
| PARAM_VALUE |
3 |
cxl_rr->region->params.interleave_ways |
(-2147483647)-s32max |
| PARAM_VALUE |
3 |
cxl_rr->region->params.nr_targets |
s32min-2147483646 |
| PARAM_VALUE |
3 |
cxl_rr->region->params.res |
4096-ptr_max |
| PARAM_VALUE |
3 |
cxl_rr->region->params.state |
1 |
| PARAM_VALUE |
4 |
cxld |
4096-ptr_max |
| BUF_SIZE |
1 |
cxlr |
(-1),1944 |
| BUF_SIZE |
1 |
cxlr |
(-1),1944 |
| BUF_SIZE |
3 |
cxl_rr |
128 |
| BUF_SIZE |
3 |
cxl_rr->region |
(-1),1944 |
| BUF_SIZE |
4 |
cxld |
(-1),1752 |
| BUF_SIZE |
4 |
cxld |
(-1),1752 |
| CAPPED_DATA |
0 |
port |
1 |
| CAPPED_DATA |
1 |
cxlr->mode |
1 |
| CAPPED_DATA |
1 |
cxlr->params.interleave_ways |
1 |
| CAPPED_DATA |
1 |
cxlr->params.nr_targets |
1 |
| CAPPED_DATA |
2 |
cxled |
1 |
| CAPPED_DATA |
3 |
cxl_rr |
1 |
| CAPPED_DATA |
3 |
cxl_rr->region->mode |
1 |
| CAPPED_DATA |
3 |
cxl_rr->region->params.interleave_ways |
1 |
| CAPPED_DATA |
3 |
cxl_rr->region->params.nr_targets |
1 |
| DATA_SOURCE |
0 |
port |
$0 |
| DATA_SOURCE |
1 |
cxlr |
$1 |
| DATA_SOURCE |
2 |
cxled |
$2 |
| DATA_SOURCE |
3 |
cxl_rr |
r alloc_region_ref |
| DATA_SOURCE |
4 |
cxld |
r cxl_port_pick_region_decoder |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| LOCK2 |
|
_T->lock |
|
| HALF_LOCKED2 |
|
&of->mutex |
|