Defined in 1 files as a member:

Defined in 1 files as a function:

Referenced in 2 files:

Smatch caller information:

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c mdp5_ctl_blend() -> ctl_write()

Type Parameter Key Value
PARAM_VALUE 0 ctl 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm 4096-ptr_max
PARAM_VALUE 1 reg 1280-6180
CAPPED_DATA 0 ctl->ctlm->nlm 1
DATA_SOURCE 0 ctl $0
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 flags
LOCK2 0 &ctl->hw_lock
HALF_LOCKED2 &mdp5_crtc->lm_lock
HALF_LOCKED2 flags
TYPE_LOCK (struct mdp5_ctl)->hw_lock

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c mdp5_ctl_blend() -> ctl_write()

Type Parameter Key Value
PARAM_VALUE 0 ctl 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm->dev 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm->dev->dev_private 4096-ptr_max
PARAM_VALUE 1 reg 1344-6228
PARAM_VALUE 2 data 0-1073741823
CAPPED_DATA 0 ctl->ctlm->nlm 1
DATA_SOURCE 0 ctl $0
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 flags
LOCK2 0 &ctl->hw_lock
HALF_LOCKED2 &mdp5_crtc->lm_lock
HALF_LOCKED2 flags
TYPE_LOCK (struct mdp5_ctl)->hw_lock

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c mdp5_ctl_blend() -> ctl_write()

Type Parameter Key Value
PARAM_VALUE 0 ctl 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm->dev 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm->dev->dev_private 4096-ptr_max
PARAM_VALUE 1 reg 1280-6180
CAPPED_DATA 0 ctl->ctlm->nlm 1
DATA_SOURCE 0 ctl $0
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 flags
LOCK2 0 &ctl->hw_lock
HALF_LOCKED2 &mdp5_crtc->lm_lock
HALF_LOCKED2 flags
TYPE_LOCK (struct mdp5_ctl)->hw_lock

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c mdp5_ctl_blend() -> ctl_write()

Type Parameter Key Value
PARAM_VALUE 0 ctl 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm->dev 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm->dev->dev_private 4096-ptr_max
PARAM_VALUE 1 reg 1344-6228
PARAM_VALUE 2 data 0-1073741823
CAPPED_DATA 0 ctl->ctlm->nlm 1
DATA_SOURCE 0 ctl $0
FUZZY_MAX 2 data 0
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 flags
LOCK2 0 &ctl->hw_lock
HALF_LOCKED2 &mdp5_crtc->lm_lock
HALF_LOCKED2 flags
TYPE_LOCK (struct mdp5_ctl)->hw_lock

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c mdp5_ctl_commit() -> ctl_write()

Type Parameter Key Value
PARAM_VALUE 0 ctl 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm 4096-ptr_max
PARAM_VALUE 1 reg 1304,1560,1816,2072,2328,4120,4632,5144,5656,6168
PARAM_VALUE 2 data 1-u32max
DATA_SOURCE 0 ctl $0
DATA_SOURCE 2 data $2 [m]
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 flags
LOCK2 0 &ctl->hw_lock
TYPE_LOCK (struct mdp5_ctl)->hw_lock

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c mdp5_ctl_reset_blend_regs() -> ctl_write()

Type Parameter Key Value
PARAM_VALUE 0 ctl 4096-ptr_max
PARAM_VALUE 1 reg 1280-6180
PARAM_VALUE 2 data 0
DATA_SOURCE 0 ctl $0
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 flags
LOCK2 0 &ctl->hw_lock
HALF_LOCKED2 &mdp5_crtc->lm_lock
HALF_LOCKED2 flags
TYPE_LOCK (struct mdp5_ctl)->hw_lock

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c mdp5_ctl_reset_blend_regs() -> ctl_write()

Type Parameter Key Value
PARAM_VALUE 0 ctl 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm->dev 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm->dev->dev_private 4096-ptr_max
PARAM_VALUE 1 reg 1344-6228
PARAM_VALUE 2 data 0
DATA_SOURCE 0 ctl $0
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 flags
LOCK2 0 &ctl->hw_lock
HALF_LOCKED2 &mdp5_crtc->lm_lock
HALF_LOCKED2 flags
TYPE_LOCK (struct mdp5_ctl)->hw_lock

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c mdp5_ctl_set_cursor() -> ctl_write()

Type Parameter Key Value
PARAM_VALUE 0 ctl 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm->dev 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm->dev->dev_private 4096-ptr_max
PARAM_VALUE 1 reg 1280-6180
DATA_SOURCE 0 ctl $0
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 data 0-u32max
LOCK2 flags
LOCK2 0 &ctl->hw_lock
TYPE_LOCK (struct mdp5_ctl)->hw_lock

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c mdp5_ctlm_hw_reset() -> ctl_write()

Type Parameter Key Value
PARAM_VALUE 0 ctl 4096-ptr_max
PARAM_VALUE 1 reg 1300,1556,1812,2068,2324,4116,4628,5140,5652,6164
PARAM_VALUE 2 data 0
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 flags
LOCK2 0 &ctl->hw_lock
HALF_LOCKED2 global &component_mutex
TYPE_LOCK (struct mdp5_ctl)->hw_lock

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c send_start_signal() -> ctl_write()

Type Parameter Key Value
PARAM_VALUE 0 ctl 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm 4096-ptr_max
PARAM_VALUE 1 reg 1308,1564,1820,2076,2332,4124,4636,5148,5660,6172
PARAM_VALUE 2 data 1
DATA_SOURCE 0 ctl $0
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 flags
LOCK2 0 &ctl->hw_lock
TYPE_LOCK (struct mdp5_ctl)->hw_lock

drivers/gpu/drm/msm/disp/mdp5/mdp5_ctl.c set_ctl_op() -> ctl_write()

Type Parameter Key Value
PARAM_VALUE 0 ctl 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm->dev 4096-ptr_max
PARAM_VALUE 0 ctl->ctlm->dev->dev_private 4096-ptr_max
PARAM_VALUE 1 reg 1300,1556,1812,2068,2324,4116,4628,5140,5652,6164
PARAM_VALUE 2 data 0,5,16-112,131072,131088-131184,1572864,1572869,1572880-1572976,1703936,1703952-1704048
DATA_SOURCE 0 ctl $0
FUZZY_MAX 2 data 0
BIT_INFO 2 data 0x0,0x1a007f
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 flags
LOCK2 0 &ctl->hw_lock
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 &state->dev->mode_config.connection_mutex
HALF_LOCKED2 &state->dev->mode_config.connection_mutex.mutex
TYPE_LOCK (struct mdp5_ctl)->hw_lock