Defined in 1 files as a function:

Referenced in 4 files:

Smatch caller information:

drivers/crypto/cavium/cpt/cptpf_main.c cpt_configure_group() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 1536,1544-1592
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &pool->lock

drivers/crypto/cavium/cpt/cptpf_main.c cpt_disable_all_cores() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 1536,1544-1592
PARAM_VALUE 2 val 0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/crypto/cavium/cpt/cptpf_main.c cpt_disable_all_cores() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 67108864
PARAM_VALUE 2 val 0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/crypto/cavium/cpt/cptpf_main.c cpt_disable_cores() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 1536,1544-1592
CAPPED_DATA 2 val 1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &pool->lock

drivers/crypto/cavium/cpt/cptpf_main.c cpt_disable_cores() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 67108864
CAPPED_DATA 2 val 1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &pool->lock

drivers/crypto/cavium/cpt/cptpf_main.c cpt_disable_ecc_interrupts() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 592
PARAM_VALUE 2 val u64max
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/crypto/cavium/cpt/cptpf_main.c cpt_disable_exec_interrupts() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 1344
PARAM_VALUE 2 val u64max
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/crypto/cavium/cpt/cptpf_main.c cpt_disable_mbox_interrupts() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 1088
PARAM_VALUE 2 val u64max
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/crypto/cavium/cpt/cptpf_main.c cpt_enable_cores() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 67108864
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &pool->lock

drivers/crypto/cavium/cpt/cptpf_main.c cpt_enable_mbox_interrupts() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 1120
PARAM_VALUE 2 val u64max
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock

drivers/crypto/cavium/cpt/cptpf_main.c cpt_load_microcode() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 67117056,67117064-67117176
CAPPED_DATA 1 offset 1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock

drivers/crypto/cavium/cpt/cptpf_main.c cpt_reset() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 256
PARAM_VALUE 2 val 1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock

drivers/crypto/cavium/cpt/cptpf_main.c cpt_unload_microcode() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 67117056,67117064-67117176
PARAM_VALUE 2 val 0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &dev->mutex

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_clear_dovf_intr() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 1280
DATA_SOURCE 2 val r cpt_read_csr64
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 _T->lock
HALF_LOCKED2 flags
HALF_LOCKED2 irq

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_clear_irde_intr() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 1280
DATA_SOURCE 2 val r cpt_read_csr64
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 _T->lock
HALF_LOCKED2 flags
HALF_LOCKED2 irq

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_clear_mbox_intr() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 1280
DATA_SOURCE 2 val r cpt_read_csr64
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 _T->lock
HALF_LOCKED2 flags
HALF_LOCKED2 irq

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_clear_nwrp_intr() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 1280
DATA_SOURCE 2 val r cpt_read_csr64
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 _T->lock
HALF_LOCKED2 flags
HALF_LOCKED2 irq

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_clear_swerr_intr() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 1280
DATA_SOURCE 2 val r cpt_read_csr64
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 _T->lock
HALF_LOCKED2 flags
HALF_LOCKED2 irq

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_enable_done_interrupts() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 1136
DATA_SOURCE 2 val r cpt_read_csr64
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_enable_mbox_interrupts() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 1296
DATA_SOURCE 2 val r cpt_read_csr64
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_enable_swerr_interrupts() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 1296
DATA_SOURCE 2 val r cpt_read_csr64
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_ctl() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 256
DATA_SOURCE 2 val r cpt_read_csr64
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &pool->lock

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_done_ack() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 1088
DATA_SOURCE 2 val r cpt_read_csr64
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 _T->lock
HALF_LOCKED2 flags
HALF_LOCKED2 irq

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_done_numwait() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 1024
DATA_SOURCE 2 val r cpt_read_csr64
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &pool->lock

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_done_timewait() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 1024
DATA_SOURCE 2 val r cpt_read_csr64
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &pool->lock

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_doorbell() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 1536
DATA_SOURCE 2 val r cpt_read_csr64
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &pqueue->lock
HALF_LOCKED2 &queue->lock
HALF_LOCKED2 bh

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_inprog() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 1040
DATA_SOURCE 2 val r cpt_read_csr64
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &pool->lock

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_saddr() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 0 hw_addr 4096-ptr_max
PARAM_VALUE 1 offset 512
DATA_SOURCE 2 val $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &pool->lock

drivers/crypto/cavium/cpt/cptvf_mbox.c cptvf_send_msg_to_pf() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 4096
PARAM_VALUE 2 val 1-6
HARD_MAX 2 val 6
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/crypto/cavium/cpt/cptvf_mbox.c cptvf_send_msg_to_pf() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 4104
PARAM_VALUE 2 val 0-1,8185
HARD_MAX 2 val 8185
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/crypto/cavium/cpt/cptpf_mbox.c cpt_bind_vq_to_grp() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 134217728,135266304-149946368
DATA_SOURCE 2 val r cpt_read_csr64
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 _T->lock
HALF_LOCKED2 flags

drivers/crypto/cavium/cpt/cptpf_mbox.c cpt_cfg_qlen_for_vf() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 134217728,135266304-149946368
DATA_SOURCE 2 val r cpt_read_csr64
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 _T->lock
HALF_LOCKED2 flags

drivers/crypto/cavium/cpt/cptpf_mbox.c cpt_cfg_vq_priority() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 134217728,135266304-149946368
DATA_SOURCE 2 val r cpt_read_csr64
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 2 val 0-u64max
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 _T->lock
HALF_LOCKED2 flags

drivers/crypto/cavium/cpt/cptpf_mbox.c cpt_clear_mbox_intr() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 1024
PARAM_VALUE 2 val 0-s32max,18446744071562067968-u64max
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 _T->lock
HALF_LOCKED2 flags

drivers/crypto/cavium/cpt/cptpf_mbox.c cpt_send_msg_to_vf() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 134222080,135270656-149950720
PARAM_VALUE 2 val 0-15
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 _T->lock
HALF_LOCKED2 flags

drivers/crypto/cavium/cpt/cptpf_mbox.c cpt_send_msg_to_vf() -> cpt_write_csr64()

Type Parameter Key Value
PARAM_VALUE 1 offset 134221824,135270400-149950464
PARAM_VALUE 2 val 1,3,5
HARD_MAX 2 val 5
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 _T->lock
HALF_LOCKED2 flags