cpt_read_csr64 identifier - Linux source code next-20260811

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linux

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FIXME
- FIXME
  - next-20260811

Defined in 1 files as a function:

drivers/crypto/cavium/cpt/cpt_common.h, line 149 (as a function)

Referenced in 4 files:

Smatch caller information:

drivers/crypto/cavium/cpt/cptpf_main.c cpt_check_bist_status() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw_addr	4096-ptr_max
PARAM_VALUE	1	offset	352
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&pool->lock

drivers/crypto/cavium/cpt/cptpf_main.c cpt_check_exe_bist_status() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw_addr	4096-ptr_max
PARAM_VALUE	1	offset	67108904
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&pool->lock

drivers/crypto/cavium/cpt/cptpf_main.c cpt_configure_group() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw_addr	4096-ptr_max
PARAM_VALUE	1	offset	1536,1544-1592
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&pool->lock

drivers/crypto/cavium/cpt/cptpf_main.c cpt_disable_all_cores() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	2048
RX_PATH
TASK_NOT_RUNNING

drivers/crypto/cavium/cpt/cptpf_main.c cpt_disable_all_cores() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	2048
RX_PATH
TASK_NOT_RUNNING

drivers/crypto/cavium/cpt/cptpf_main.c cpt_disable_cores() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw_addr	4096-ptr_max
PARAM_VALUE	1	offset	1536,1544-1592
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&pool->lock

drivers/crypto/cavium/cpt/cptpf_main.c cpt_disable_cores() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw_addr	4096-ptr_max
PARAM_VALUE	1	offset	2048
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&pool->lock

drivers/crypto/cavium/cpt/cptpf_main.c cpt_disable_cores() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw_addr	4096-ptr_max
PARAM_VALUE	1	offset	2048
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&pool->lock

drivers/crypto/cavium/cpt/cptpf_main.c cpt_disable_cores() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw_addr	4096-ptr_max
PARAM_VALUE	1	offset	67108864
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&pool->lock

drivers/crypto/cavium/cpt/cptpf_main.c cpt_enable_cores() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw_addr	4096-ptr_max
PARAM_VALUE	1	offset	67108864
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&pool->lock

drivers/crypto/cavium/cpt/cptpf_main.c cpt_find_max_enabled_cores() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw_addr	4096-ptr_max
PARAM_VALUE	1	offset	0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&pool->lock

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_clear_dovf_intr() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	1280
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags
HALF_LOCKED2		irq

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_clear_irde_intr() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	1280
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags
HALF_LOCKED2		irq

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_clear_mbox_intr() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	1280
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags
HALF_LOCKED2		irq

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_clear_nwrp_intr() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	1280
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags
HALF_LOCKED2		irq

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_clear_swerr_intr() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	1280
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags
HALF_LOCKED2		irq

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_enable_done_interrupts() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw_addr	4096-ptr_max
PARAM_VALUE	1	offset	1136
RX_PATH
TASK_NOT_RUNNING

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_enable_mbox_interrupts() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw_addr	4096-ptr_max
PARAM_VALUE	1	offset	1296
RX_PATH
TASK_NOT_RUNNING

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_enable_swerr_interrupts() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw_addr	4096-ptr_max
PARAM_VALUE	1	offset	1296
RX_PATH
TASK_NOT_RUNNING

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_read_vf_misc_intr_status() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	1280
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags
HALF_LOCKED2		irq

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_read_vq_done_count() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	1056
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags
HALF_LOCKED2		irq

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_ctl() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw_addr	4096-ptr_max
PARAM_VALUE	1	offset	256
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&pool->lock

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_done_ack() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	1088
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags
HALF_LOCKED2		irq

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_done_numwait() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw_addr	4096-ptr_max
PARAM_VALUE	1	offset	1024
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&pool->lock

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_done_timewait() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw_addr	4096-ptr_max
PARAM_VALUE	1	offset	1024
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&pool->lock

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_doorbell() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	1536
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&pqueue->lock
HALF_LOCKED2		&queue->lock
HALF_LOCKED2		bh

drivers/crypto/cavium/cpt/cptvf_main.c cptvf_write_vq_inprog() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	0	hw_addr	4096-ptr_max
PARAM_VALUE	1	offset	1040
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&pool->lock

drivers/crypto/cavium/cpt/cptvf_mbox.c cptvf_handle_mbox_intr() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	4096
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags
HALF_LOCKED2		irq

drivers/crypto/cavium/cpt/cptvf_mbox.c cptvf_handle_mbox_intr() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	4104
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags
HALF_LOCKED2		irq

drivers/crypto/cavium/cpt/cptpf_mbox.c cpt_bind_vq_to_grp() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	134217728,135266304-149946368
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags

drivers/crypto/cavium/cpt/cptpf_mbox.c cpt_cfg_qlen_for_vf() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	134217728,135266304-149946368
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags

drivers/crypto/cavium/cpt/cptpf_mbox.c cpt_cfg_vq_priority() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	134217728,135266304-149946368
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags

drivers/crypto/cavium/cpt/cptpf_mbox.c cpt_handle_mbox_intr() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	134221824,135270400-149950464
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags

drivers/crypto/cavium/cpt/cptpf_mbox.c cpt_handle_mbox_intr() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	134222080,135270656-149950720
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags

drivers/crypto/cavium/cpt/cptpf_mbox.c cpt_mbox_intr_handler() -> cpt_read_csr64()

Type	Parameter	Key	Value
PARAM_VALUE	1	offset	1024
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags
HALF_LOCKED2		irq