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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/infiniband/core/cm.c cm_sidr_req_handler() -> cm_insert_remote_sidr()

Type Parameter Key Value
PARAM_VALUE 0 cm_id_priv 4096-ptr_max
PARAM_VALUE 0 cm_id_priv->av.ah_attr->roce.dmac 0-255
PARAM_VALUE 0 cm_id_priv->av.ah_attr.ah_flags 0-1
PARAM_VALUE 0 cm_id_priv->av.ah_attr.grh.flow_label 0
PARAM_VALUE 0 cm_id_priv->av.ah_attr.grh.hop_limit 0
PARAM_VALUE 0 cm_id_priv->av.ah_attr.grh.sgid_attr 0,4096-ptr_max
PARAM_VALUE 0 cm_id_priv->av.ah_attr.grh.sgid_index 0
PARAM_VALUE 0 cm_id_priv->av.ah_attr.ib.dlid 0
PARAM_VALUE 0 cm_id_priv->av.ah_attr.ib.src_path_bits 0
PARAM_VALUE 0 cm_id_priv->av.ah_attr.opa.dlid 0
PARAM_VALUE 0 cm_id_priv->av.ah_attr.opa.make_grd 0
PARAM_VALUE 0 cm_id_priv->av.ah_attr.static_rate 0
PARAM_VALUE 0 cm_id_priv->av.ah_attr.type 0-3
PARAM_VALUE 0 cm_id_priv->av.port 0,4096-ptr_max
PARAM_VALUE 0 cm_id_priv->comp.done 0
PARAM_VALUE 0 cm_id_priv->comp.wait.lock.magic 3735899821
PARAM_VALUE 0 cm_id_priv->comp.wait.lock.owner (-1)
PARAM_VALUE 0 cm_id_priv->comp.wait.lock.owner_cpu u32max
PARAM_VALUE 0 cm_id_priv->comp.wait.task_list.next 4096-ptr_max
PARAM_VALUE 0 cm_id_priv->comp.wait.task_list.next->next 4096-ptr_max
PARAM_VALUE 0 cm_id_priv->comp.wait.task_list.prev 4096-ptr_max
PARAM_VALUE 0 cm_id_priv->comp.wait.task_list.prev->next 4096-ptr_max
PARAM_VALUE 0 cm_id_priv->comp.wait.task_list.prev->prev 4096-ptr_max
PARAM_VALUE 0 cm_id_priv->id.cm_handler 0
PARAM_VALUE 0 cm_id_priv->id.context 0
PARAM_VALUE 0 cm_id_priv->id.remote_cm_qpn 1
PARAM_VALUE 0 cm_id_priv->id.state 0
PARAM_VALUE 0 cm_id_priv->refcount.refs.counter 1
PARAM_VALUE 0 cm_id_priv->work_count.counter (-1)
PARAM_VALUE 0 cm_id_priv->work_list.next 4096-ptr_max
PARAM_VALUE 0 cm_id_priv->work_list.next->next 4096-ptr_max
PARAM_VALUE 0 cm_id_priv->work_list.prev 4096-ptr_max
PARAM_VALUE 0 cm_id_priv->work_list.prev->next 4096-ptr_max
PARAM_VALUE 0 cm_id_priv->work_list.prev->prev 4096-ptr_max
BUF_SIZE 0 cm_id_priv 552
DATA_SOURCE 0 cm_id_priv r cm_alloc_id_priv
MEM_ZERO 0 &cm_id_priv->av.ah_attr
PREEMPT_ADD <- disables preempt
NO_OVERFLOW_SIMPLE 0 cm_id_priv->id.device->hw_stats_attr_index
NO_OVERFLOW_SIMPLE 0 cm_id_priv->id.device->num_comp_vectors
LOCK2 global &cm.lock
LOCK2 irq
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct ib_cm)->lock