Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 5 files:
- drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c
- drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c, line 297
- drivers/gpu/drm/amd/display/dc/dwb/dcn30/dcn30_dwb_cm.c
- drivers/gpu/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.c
- drivers/gpu/drm/amd/display/dc/mpc/dcn32/dcn32_mpc.c
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../display/dc/dwb/dcn30/dcn30_dwb_cm.c dwb3_program_ogam_luta_settings() -> cm_helper_program_gamcor_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->cgs_device | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.saved_flags | 0-4294967295 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageDCCCompressionRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.BPP | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.BandwidthAvailableForImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CriticalPoint | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CursorBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CursorChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DCFCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DCFCLKDeepSleep | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DETBufferSizeInTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKRampingMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithoutRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLK_calculated | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelayCNVCCursor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelayCNVCFormater | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySCL | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySCLLBOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMChannelWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeLatencyOverride | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Downspreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETPlusLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETPlusLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveFECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FCLKChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricAndDRAMBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricClock | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalFillMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FractionOfUrgentBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FractionOfUrgentBandwidthImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.GPUVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.GlobalDPPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.HostVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.InitFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LastPixelOfLineExtraWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesInDETChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesInDETLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDCHUBToPSCLThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDispclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDppclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxPSCLToLBThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxTotalVActiveRDBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVRatioPre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumReadBandwidthWithPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumReadBandwidthWithoutPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInDETBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBufferChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBufferLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthSupport | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveDRAMClockChangeMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinPixelChunkSizeBytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinUrgentLatencySupportUs | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NextMaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NonUrgentLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NumberOfChannels | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Outbpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PTEGroupSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PartOfBurstThatFitsInROB | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine2To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine4To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RemainingFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBW | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBWToDCNPerState | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBandwidthToDCN | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBusWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundTripPingLatencyCycles | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SMNLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SOCCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SREnterPlusExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SREnterPlusExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SRExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SRExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SmallestVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SrcActiveDrainRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterBurstTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterPeriod | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterPeriodBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SurfaceRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SurfaceRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthGranularityC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthGranularityY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthYCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TFinalxFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TInitXFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TWait | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TimeCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalBandwidthConsumedGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalDSCUnitsRequired | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalDataReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalNumberOfActiveOTG | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalRowReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TslvChk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.USRRetrainingLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencySupportUsChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencySupportUsLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.VBlankTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.VStartupMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.FCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.USRRetrainingWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackFCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackChromaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackInterfaceBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferChromaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferLumaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLumaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxHSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxVSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMinHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMinVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCBusTransportTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCFillBWOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCFillConstant | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCSlvChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVreadyOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVupdateOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVupdateWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.bpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dst_x_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dst_y_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dummy5 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dummy6 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.total_dcn_read_bw_with_flip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| PARAM_VALUE | 1 | params->hw_points_num | 1-u32max |
| PARAM_VALUE | 2 | reg | 8077638401707581440 |
| BUF_SIZE | 1 | params | 19216 |
| DATA_SOURCE | 1 | params | $1 |
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/dwb/dcn30/dcn30_dwb_cm.c dwb3_program_ogam_lutb_settings() -> cm_helper_program_gamcor_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->cgs_device | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->mes.saved_flags | 0-4294967295 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | ctx->cgs_device->adev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageDCCCompressionRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.BPP | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.BandwidthAvailableForImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CriticalPoint | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CursorBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.CursorChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DCFCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DCFCLKDeepSleep | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DETBufferSizeInTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKRampingMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithoutRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DISPCLK_calculated | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelayCNVCCursor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelayCNVCFormater | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySCL | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySCLLBOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMChannelWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeLatencyOverride | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.DRAMSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Downspreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETPlusLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveDETPlusLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.EffectiveFECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FCLKChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricAndDRAMBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricClock | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FinalFillMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FractionOfUrgentBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FractionOfUrgentBandwidthImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.GPUVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.GlobalDPPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.HostVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.InitFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LastPixelOfLineExtraWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesInDETChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesInDETLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDCHUBToPSCLThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDispclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxDppclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxPSCLToLBThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxTotalVActiveRDBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVRatioPre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumReadBandwidthWithPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumReadBandwidthWithoutPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInDETBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBufferChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthInLineBufferLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MaximumSwathWidthSupport | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveDRAMClockChangeMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinPixelChunkSizeBytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.MinUrgentLatencySupportUs | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NextMaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NonUrgentLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.NumberOfChannels | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Outbpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PTEGroupSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PartOfBurstThatFitsInROB | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine2To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine4To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.PlaneRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RemainingFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBW | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBWToDCNPerState | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBandwidthToDCN | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ReturnBusWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundTripPingLatencyCycles | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SMNLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SOCCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SREnterPlusExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SREnterPlusExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SRExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SRExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SmallestVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SrcActiveDrainRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterBurstTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterPeriod | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.StutterPeriodBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SurfaceRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SurfaceRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthGranularityC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthGranularityY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.SwathWidthYCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TFinalxFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TInitXFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TWait | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TimeCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalBandwidthConsumedGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalDSCUnitsRequired | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalDataReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalNumberOfActiveOTG | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TotalRowReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.TslvChk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.USRRetrainingLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencySupportUsChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencySupportUsLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.VBlankTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.VStartupMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.FCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.USRRetrainingWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackFCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Watermark.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackChromaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackInterfaceBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferChromaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferLumaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLineBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackLumaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxHSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMaxVSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMinHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackMinVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCBusTransportTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCFillBWOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCFillConstant | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCSlvChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVreadyOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVupdateOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCTSlvVupdateWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.bpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dst_x_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dst_y_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dummy5 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.dummy6 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.total_dcn_read_bw_with_flip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_dc_power_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | ctx->dc->dml2_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| PARAM_VALUE | 1 | params->hw_points_num | 1-u32max |
| PARAM_VALUE | 2 | reg | 7572938812697419776 |
| BUF_SIZE | 1 | params | 19216 |
| DATA_SOURCE | 1 | params | $1 |
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/dpp/dcn30/dcn30_dpp_cm.c dpp3_program_gamcor_lut() -> cm_helper_program_gamcor_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| PARAM_VALUE | 2 | reg | 5319624291940085760 |
| BUF_SIZE | 1 | params | 0,19216 |
| BUF_SIZE | 1 | params | 0,19216 |
| DATA_SOURCE | 1 | params | $1 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/mpc/dcn32/dcn32_mpc.c mpc32_program_post1dluta_settings() -> cm_helper_program_gamcor_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 1 | params | 1-u64max |
| PARAM_VALUE | 2 | reg | 6696895630722744320 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_lut_offset | 0,511 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_num_segments | 0,28672 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_lut_offset | 0,33488896 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_num_segments | 0,1879048192 |
| PARAM_VALUE | 2 | reg->masks.exp_region_start | 0,262143 |
| PARAM_VALUE | 2 | reg->masks.exp_resion_start_segment | 0,133169152 |
| PARAM_VALUE | 2 | reg->masks.field_region_end | 0,u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_end_base | 0,262143 |
| PARAM_VALUE | 2 | reg->masks.field_region_end_slope | 0,4294901760 |
| PARAM_VALUE | 2 | reg->masks.field_region_linear_slope | 0,262143 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_lut_offset | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_num_segments | 0,12 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_lut_offset | 0,16 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_num_segments | 0,28 |
| PARAM_VALUE | 2 | reg->shifts.exp_region_start | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_resion_start_segment | 0,20 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_base | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_slope | 0,16 |
| PARAM_VALUE | 2 | reg->shifts.field_region_linear_slope | 0 |
| BUF_SIZE | 1 | params | (-1)-0,19216 |
| BUF_SIZE | 1 | params | (-1)-0,19216 |
| DATA_SOURCE | 1 | params | $2 |
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/mpc/dcn32/dcn32_mpc.c mpc32_program_post1dlutb_settings() -> cm_helper_program_gamcor_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 1 | params | 1-u64max |
| PARAM_VALUE | 2 | reg | 7823620207329488896 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_lut_offset | 0,511 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_num_segments | 0,28672 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_lut_offset | 0,33488896 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_num_segments | 0,1879048192 |
| PARAM_VALUE | 2 | reg->masks.exp_region_start | 0,262143 |
| PARAM_VALUE | 2 | reg->masks.exp_resion_start_segment | 0,133169152 |
| PARAM_VALUE | 2 | reg->masks.field_region_end | 0,u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_end_base | 0,262143 |
| PARAM_VALUE | 2 | reg->masks.field_region_end_slope | 0,4294901760 |
| PARAM_VALUE | 2 | reg->masks.field_region_linear_slope | 0,262143 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_lut_offset | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_num_segments | 0,12 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_lut_offset | 0,16 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_num_segments | 0,28 |
| PARAM_VALUE | 2 | reg->shifts.exp_region_start | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_resion_start_segment | 0,20 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_base | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_slope | 0,16 |
| PARAM_VALUE | 2 | reg->shifts.field_region_linear_slope | 0 |
| BUF_SIZE | 1 | params | (-1)-0,19216 |
| BUF_SIZE | 1 | params | (-1)-0,19216 |
| DATA_SOURCE | 1 | params | $2 |
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/mpc/dcn30/dcn30_mpc.c mpc3_program_luta() -> cm_helper_program_gamcor_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| PARAM_VALUE | 2 | reg | 684695636763746304 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_lut_offset | 511 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_num_segments | 28672 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_lut_offset | 33488896 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_num_segments | 1879048192 |
| PARAM_VALUE | 2 | reg->masks.exp_region_start | 262143 |
| PARAM_VALUE | 2 | reg->masks.exp_resion_start_segment | 133169152 |
| PARAM_VALUE | 2 | reg->masks.field_offset | 524287 |
| PARAM_VALUE | 2 | reg->masks.field_region_end | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_end_base | 262143 |
| PARAM_VALUE | 2 | reg->masks.field_region_end_slope | 4294901760 |
| PARAM_VALUE | 2 | reg->masks.field_region_linear_slope | 262143 |
| PARAM_VALUE | 2 | reg->masks.field_region_start_base | 262143 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_lut_offset | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_num_segments | 12 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_lut_offset | 16 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_num_segments | 28 |
| PARAM_VALUE | 2 | reg->shifts.exp_region_start | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_resion_start_segment | 20 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_base | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_slope | 16 |
| PARAM_VALUE | 2 | reg->shifts.field_region_linear_slope | 0 |
| BUF_SIZE | 1 | params | 0,19216 |
| BUF_SIZE | 1 | params | 0,19216 |
| DATA_SOURCE | 1 | params | $2 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/mpc/dcn30/dcn30_mpc.c mpc3_program_lutb() -> cm_helper_program_gamcor_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| PARAM_VALUE | 2 | reg | 4889085636853833728 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_lut_offset | 511 |
| PARAM_VALUE | 2 | reg->masks.exp_region0_num_segments | 28672 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_lut_offset | 33488896 |
| PARAM_VALUE | 2 | reg->masks.exp_region1_num_segments | 1879048192 |
| PARAM_VALUE | 2 | reg->masks.exp_region_start | 262143 |
| PARAM_VALUE | 2 | reg->masks.exp_resion_start_segment | 133169152 |
| PARAM_VALUE | 2 | reg->masks.field_offset | 524287 |
| PARAM_VALUE | 2 | reg->masks.field_region_end | u16max |
| PARAM_VALUE | 2 | reg->masks.field_region_end_base | 262143 |
| PARAM_VALUE | 2 | reg->masks.field_region_end_slope | 4294901760 |
| PARAM_VALUE | 2 | reg->masks.field_region_linear_slope | 262143 |
| PARAM_VALUE | 2 | reg->masks.field_region_start_base | 262143 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_lut_offset | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_region0_num_segments | 12 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_lut_offset | 16 |
| PARAM_VALUE | 2 | reg->shifts.exp_region1_num_segments | 28 |
| PARAM_VALUE | 2 | reg->shifts.exp_region_start | 0 |
| PARAM_VALUE | 2 | reg->shifts.exp_resion_start_segment | 20 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_base | 0 |
| PARAM_VALUE | 2 | reg->shifts.field_region_end_slope | 16 |
| PARAM_VALUE | 2 | reg->shifts.field_region_linear_slope | 0 |
| BUF_SIZE | 1 | params | 0,19216 |
| BUF_SIZE | 1 | params | 0,19216 |
| DATA_SOURCE | 1 | params | $2 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/dpp/dcn30/dcn30_dpp.c dpp3_program_blnd_luta_settings() -> cm_helper_program_gamcor_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| PARAM_VALUE | 2 | reg | 2963572796313284608 |
| PARAM_VALUE | 2 | reg->region_end | 17005,17368,17731,18094,18457,18820 |
| PARAM_VALUE | 2 | reg->region_start | 16989,17352,17715,18078,18441,18804 |
| PARAM_VALUE | 2 | reg->start_cntl_b | 16971,17334,17697,18060,18423,18786 |
| PARAM_VALUE | 2 | reg->start_cntl_g | 16972,17335,17698,18061,18424,18787 |
| PARAM_VALUE | 2 | reg->start_cntl_r | 16973,17336,17699,18062,18425,18788 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_b | 16980,17343,17706,18069,18432,18795 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_g | 16982,17345,17708,18071,18434,18797 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_r | 16984,17347,17710,18073,18436,18799 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_b | 16981,17344,17707,18070,18433,18796 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_g | 16983,17346,17709,18072,18435,18798 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_r | 16985,17348,17711,18074,18437,18800 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_b | 16974,17337,17700,18063,18426,18789 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_g | 16975,17338,17701,18064,18427,18790 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_r | 16976,17339,17702,18065,18428,18791 |
| BUF_SIZE | 1 | params | 0,19216 |
| BUF_SIZE | 1 | params | 0,19216 |
| DATA_SOURCE | 1 | params | $1 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/dpp/dcn30/dcn30_dpp.c dpp3_program_blnd_lutb_settings() -> cm_helper_program_gamcor_xfer_func()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | params | 4096-ptr_max |
| PARAM_VALUE | 2 | reg | 3541920712941883392 |
| PARAM_VALUE | 2 | reg->region_end | 17040,17403,17766,18129,18492,18855 |
| PARAM_VALUE | 2 | reg->region_start | 17024,17387,17750,18113,18476,18839 |
| PARAM_VALUE | 2 | reg->start_cntl_b | 17006,17369,17732,18095,18458,18821 |
| PARAM_VALUE | 2 | reg->start_cntl_g | 17007,17370,17733,18096,18459,18822 |
| PARAM_VALUE | 2 | reg->start_cntl_r | 17008,17371,17734,18097,18460,18823 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_b | 17015,17378,17741,18104,18467,18830 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_g | 17017,17380,17743,18106,18469,18832 |
| PARAM_VALUE | 2 | reg->start_end_cntl1_r | 17019,17382,17745,18108,18471,18834 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_b | 17016,17379,17742,18105,18468,18831 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_g | 17018,17381,17744,18107,18470,18833 |
| PARAM_VALUE | 2 | reg->start_end_cntl2_r | 17020,17383,17746,18109,18472,18835 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_b | 17009,17372,17735,18098,18461,18824 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_g | 17010,17373,17736,18099,18462,18825 |
| PARAM_VALUE | 2 | reg->start_slope_cntl_r | 17011,17374,17737,18100,18463,18826 |
| BUF_SIZE | 1 | params | 0,19216 |
| BUF_SIZE | 1 | params | 0,19216 |
| DATA_SOURCE | 1 | params | $1 |
| NOCHECK_CALL |