Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 48 files:

Smatch caller information:

drivers/clk/renesas/clk-sh73a0.c sh73a0_cpg_register_clock() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 3 flags 0
PARAM_VALUE 4 mult 1-128
PARAM_VALUE 5 div 1-2
BUF_SIZE 2 parent_name s32min,(-10),(-1)-s32max
BUF_SIZE 2 parent_name s32min,(-10),(-1)-s32max
DATA_SOURCE 1 name $3
FUZZY_MAX 4 mult 1
FUZZY_MAX 5 div 1
STR_LEN 0 dev (-1),4,7
STR_LEN 2 parent_name (-1),4,7
HOST_DATA 4 mult 1-128[c]
HOST_DATA 5 div 1-2[c]

drivers/clk/ti/adpll.c ti_adpll_init_fixed_factor() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->devres_head.prev 4096-ptr_max
PARAM_VALUE 0 dev->devres_head.prev->next 4096-ptr_max
PARAM_VALUE 0 dev->devres_head.prev->next->next 4096-ptr_max
PARAM_VALUE 0 dev->driver 0,4096-ptr_max
PARAM_VALUE 0 dev->driver_data 4096-ptr_max
PARAM_VALUE 0 dev->power.wakeirq->status 0-4294967295
PARAM_VALUE 0 *dev->p->deferred_probe_reason 0-255
PARAM_VALUE 1 name 1-u64max
PARAM_VALUE 3 flags 0
PARAM_VALUE 4 mult 1
PARAM_VALUE 5 div 2
BUF_SIZE 0 dev 1616
BUF_SIZE 1 name (-1)-s32max
BUF_SIZE 1 name (-1)-s32max
BUF_SIZE 2 parent_name s32min,(-10),(-1),1-s32max
BUF_SIZE 2 parent_name s32min,(-10),(-1),1-s32max
DATA_SOURCE 1 name r ti_adpll_clk_get_name
DATA_SOURCE 2 parent_name r __clk_get_name
DATA_SOURCE 4 mult $4
DATA_SOURCE 5 div $5
RX_PATH
TASK_NOT_RUNNING

drivers/clk/renesas/renesas-cpg-mssr.c cpg_mssr_register_core_clk() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 3 flags 0
PARAM_VALUE 5 div 0-25165952
BUF_SIZE 2 parent_name s32min,(-10),(-1),1-s32max
BUF_SIZE 2 parent_name s32min,(-10),(-1),1-s32max
DATA_SOURCE 2 parent_name r __clk_get_name
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 5 div 0-25165952[c]

drivers/clk/renesas/rcar-gen3-cpg.c rcar_gen3_cpg_clk_register() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 3 flags 0
PARAM_VALUE 4 mult 0-256
BUF_SIZE 2 parent_name s32min,(-10),(-1),1-s32max
FUZZY_MAX 4 mult 1
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 4 mult 2-256[c]

drivers/clk/renesas/clk-r8a7779.c r8a7779_cpg_register_clock() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 3 flags 0
PARAM_VALUE 4 mult 1-2,42,48,56,64
PARAM_VALUE 5 div 1-3,6,8,12,16,24,32,36
BUF_SIZE 2 parent_name s32min,(-10),(-1)-s32max
BUF_SIZE 2 parent_name s32min,(-10),(-1)-s32max
DATA_SOURCE 1 name $3
FUZZY_MAX 4 mult 1
FUZZY_MAX 5 div 1
STR_LEN 0 dev (-1),4
STR_LEN 2 parent_name (-1),4
TERMINATED 2 parent_name 1

drivers/clk/renesas/clk-r8a7740.c r8a7740_cpg_register_clock() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 3 flags 0
PARAM_VALUE 4 mult 1-128
PARAM_VALUE 5 div 1-2,1024,2048
BUF_SIZE 2 parent_name s32min,(-10),(-1)-s32max
BUF_SIZE 2 parent_name s32min,(-10),(-1)-s32max
DATA_SOURCE 1 name $3
FUZZY_MAX 4 mult 1
FUZZY_MAX 5 div 2048
STR_LEN 0 dev (-1),6
STR_LEN 2 parent_name (-1),6
BIT_INFO 5 div 0x0,0xc03
HARD_MAX 5 div 2048
HOST_DATA 4 mult 1-128[c]

drivers/clk/clk-qoriq.c create_one_pll() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 2 parent_name 3126017099814678528,5802126901881499648
PARAM_VALUE 3 flags 0
PARAM_VALUE 4 mult 0-127
PARAM_VALUE 5 div 1-32
BUF_SIZE 1 name 32
BUF_SIZE 2 parent_name 10-11
BUF_SIZE 2 parent_name 10-11
STR_LEN 0 dev 9-10
STR_LEN 2 parent_name 9-10
BIT_INFO 2 parent_name 0x143ad20403000,0x7be5dffd6c627000
BIT_INFO 2 parent_name 0x143ad20403000,0x7be5dffd6c627000
TERMINATED 2 parent_name 1
HOST_DATA 4 mult 0-127[c]

drivers/clk/clk-qoriq.c input_clock() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 1 name 3126017099814678528,5802126901881499648
PARAM_VALUE 3 flags 0
PARAM_VALUE 4 mult 1
PARAM_VALUE 5 div 1
BUF_SIZE 1 name 10-11
BUF_SIZE 1 name 10-11
BUF_SIZE 2 parent_name s32min,(-10),(-1),1-s32max
BUF_SIZE 2 parent_name s32min,(-10),(-1),1-s32max
DATA_SOURCE 1 name $0
DATA_SOURCE 2 parent_name r __clk_get_name
STR_LEN 0 dev 9-10
STR_LEN 1 name 9-10

drivers/clk/renesas/r9a06g032-clocks.c r9a06g032_clocks_probe() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 3 flags 0
BUF_SIZE 2 parent_name s32min,(-10),(-1),1-s32max
BUF_SIZE 2 parent_name s32min,(-10),(-1),1-s32max
RX_PATH
TASK_NOT_RUNNING

drivers/clk/renesas/rcar-gen2-cpg.c rcar_gen2_cpg_clk_register() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 3 flags 0
PARAM_VALUE 5 div 0-3,8,10,24,36
BUF_SIZE 2 parent_name s32min,(-10),(-1),1-s32max
BUF_SIZE 2 parent_name s32min,(-10),(-1),1-s32max
DATA_SOURCE 2 parent_name r __clk_get_name
FUZZY_MAX 5 div 36
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 4 mult 2-256[c]

drivers/clk/pistachio/clk.c pistachio_clk_register_fixed_factor() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 3 flags 0
PARAM_VALUE 4 mult 1

drivers/clk/renesas/clk-r8a73a4.c r8a73a4_cpg_register_clock() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 3 flags 0
PARAM_VALUE 4 mult 1-128
PARAM_VALUE 5 div 1-2,4,32-64
BUF_SIZE 2 parent_name s32min,(-10),(-1)-s32max
BUF_SIZE 2 parent_name s32min,(-10),(-1)-s32max
DATA_SOURCE 1 name $3
FUZZY_MAX 4 mult 1
FUZZY_MAX 5 div 4
STR_LEN 0 dev (-1),4,6
STR_LEN 2 parent_name (-1),4,6
HOST_DATA 4 mult 1-128[c]

drivers/clk/rockchip/clk.c rockchip_clk_register_factor_branch() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
DATA_SOURCE 1 name $0
DATA_SOURCE 3 flags $9
DATA_SOURCE 4 mult $4
DATA_SOURCE 5 div $5
RX_PATH
TASK_NOT_RUNNING

drivers/clk/renesas/clk-rz.c rz_cpg_register_clock() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 3 flags 0
PARAM_VALUE 4 mult 8,30
PARAM_VALUE 5 div 1
BUF_SIZE 2 parent_name s32min,(-10),(-1)-s32max
BUF_SIZE 2 parent_name s32min,(-10),(-1)-s32max
DATA_SOURCE 1 name $2
DATA_SOURCE 2 parent_name r of_clk_get_parent_name
FUZZY_MAX 4 mult 30
BIT_INFO 4 mult 0x8,0x1e
HARD_MAX 4 mult 30

drivers/clk/renesas/clk-rz.c rz_cpg_register_clock() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 2 parent_name 6917367529365635072
PARAM_VALUE 3 flags 0
PARAM_VALUE 5 div 3
BUF_SIZE 2 parent_name 4
DATA_SOURCE 1 name $2
STR_LEN 0 dev 3
TERMINATED 2 parent_name 1

drivers/clk/renesas/clk-r8a7778.c r8a7778_cpg_register_clock() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 1 name 8422107035439497216
PARAM_VALUE 3 flags 0
PARAM_VALUE 5 div 1
BUF_SIZE 1 name 5
BUF_SIZE 2 parent_name s32min,(-10),(-1)-s32max
STR_LEN 0 dev 4
TERMINATED 1 name 1

drivers/clk/renesas/clk-r8a7778.c r8a7778_cpg_register_clock() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 1 name 5754479258886815744
PARAM_VALUE 3 flags 0
PARAM_VALUE 5 div 1
BUF_SIZE 1 name 5
BUF_SIZE 2 parent_name s32min,(-10),(-1)-s32max
STR_LEN 0 dev 4
TERMINATED 1 name 1

drivers/clk/renesas/clk-r8a7778.c r8a7778_cpg_register_clock() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 2 parent_name 8422107035439497216
PARAM_VALUE 3 flags 0
PARAM_VALUE 4 mult 1
PARAM_VALUE 5 div 3-4,6,8,12,16,18
BUF_SIZE 2 parent_name 5
STR_LEN 0 dev 4
TERMINATED 2 parent_name 1

drivers/clk/renesas/rcar-gen4-cpg.c rcar_gen4_cpg_clk_register() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 3 flags 0
BUF_SIZE 2 parent_name s32min,(-10),(-1),1-s32max
RX_PATH
TASK_NOT_RUNNING

drivers/clk/renesas/r7s9210-cpg-mssr.c rza2_cpg_clk_register() -> clk_register_fixed_factor()

Type Parameter Key Value
PARAM_VALUE 0 dev 0
PARAM_VALUE 3 flags 0
PARAM_VALUE 4 mult 1,44,88
PARAM_VALUE 5 div 1
BUF_SIZE 2 parent_name s32min,(-10),(-1),1-s32max
FUZZY_MAX 4 mult 88
BIT_INFO 4 mult 0x0,0x7d
HARD_MAX 4 mult 88
RX_PATH
TASK_NOT_RUNNING